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ipq40xx: fix AP-303H PSE GPIO pin

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The GPIO chip is at a different start index compared to OpenWrt master.

Signed-off-by: David Bauer <mail@david-bauer.net>
This commit is contained in:
David Bauer 2024-09-27 19:10:40 +02:00
parent 6e561fe0a1
commit 5332351821
1 changed files with 1 additions and 1 deletions
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2
target/linux/ipq40xx/base-files/etc/board.d/03_gpio_switches
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@ -7,7 +7,7 @@ board=$(board_name)
case "$board" in
aruba,ap-303h)
ucidef_add_gpio_switch "poe_passtrough" "POE passtrough disable" "546" "1"
ucidef_add_gpio_switch "poe_passtrough" "POE passtrough disable" "446" "1"
;;
cellc,rtl30vw)
ucidef_add_gpio_switch "w_disable" "W_DISABLE mPCIE pin" "398" "1"