mirror of https://github.com/mpv-player/mpv
fix Radeon/Rage128 vidix with I420 colorspace (U/V were inverted)
git-svn-id: svn://svn.mplayerhq.hu/mplayer/trunk@23672 b3059339-0415-0410-9bf9-f77b7e298cf2
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@ -3055,8 +3055,16 @@ static int radeon_vid_init_video( vidix_playback_t *config )
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}
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}
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else
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else
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{
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{
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besr.vid_buf_base_adrs_v[i]=((radeon_overlay_off+config->offsets[i]+config->offset.v)&VIF_BUF1_BASE_ADRS_MASK)|VIF_BUF1_PITCH_SEL;
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if (besr.fourcc == IMGFMT_I420 || besr.fourcc == IMGFMT_IYUV)
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besr.vid_buf_base_adrs_u[i]=((radeon_overlay_off+config->offsets[i]+config->offset.u)&VIF_BUF2_BASE_ADRS_MASK)|VIF_BUF2_PITCH_SEL;
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{
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besr.vid_buf_base_adrs_u[i]=((radeon_overlay_off+config->offsets[i]+config->offset.v)&VIF_BUF1_BASE_ADRS_MASK)|VIF_BUF1_PITCH_SEL;
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besr.vid_buf_base_adrs_v[i]=((radeon_overlay_off+config->offsets[i]+config->offset.u)&VIF_BUF2_BASE_ADRS_MASK)|VIF_BUF2_PITCH_SEL;
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}
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else
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{
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besr.vid_buf_base_adrs_v[i]=((radeon_overlay_off+config->offsets[i]+config->offset.v)&VIF_BUF1_BASE_ADRS_MASK)|VIF_BUF1_PITCH_SEL;
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besr.vid_buf_base_adrs_u[i]=((radeon_overlay_off+config->offsets[i]+config->offset.u)&VIF_BUF2_BASE_ADRS_MASK)|VIF_BUF2_PITCH_SEL;
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}
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}
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}
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}
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}
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config->offset.y = ((besr.vid_buf_base_adrs_y[0])&VIF_BUF0_BASE_ADRS_MASK) - radeon_overlay_off;
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config->offset.y = ((besr.vid_buf_base_adrs_y[0])&VIF_BUF0_BASE_ADRS_MASK) - radeon_overlay_off;
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@ -3070,13 +3078,6 @@ static int radeon_vid_init_video( vidix_playback_t *config )
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config->offset.v = ((besr.vid_buf_base_adrs_v[0])&VIF_BUF1_BASE_ADRS_MASK) - radeon_overlay_off;
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config->offset.v = ((besr.vid_buf_base_adrs_v[0])&VIF_BUF1_BASE_ADRS_MASK) - radeon_overlay_off;
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config->offset.u = ((besr.vid_buf_base_adrs_u[0])&VIF_BUF2_BASE_ADRS_MASK) - radeon_overlay_off;
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config->offset.u = ((besr.vid_buf_base_adrs_u[0])&VIF_BUF2_BASE_ADRS_MASK) - radeon_overlay_off;
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}
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}
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if(besr.fourcc == IMGFMT_I420 || besr.fourcc == IMGFMT_IYUV)
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{
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uint32_t tmp;
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tmp = config->offset.u;
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config->offset.u = config->offset.v;
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config->offset.v = tmp;
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}
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}
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}
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else
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else
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{
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{
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