mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git
synced 2024-12-19 05:34:48 +00:00
548 lines
9.2 KiB
NASM
548 lines
9.2 KiB
NASM
; usbduxfast_firmware.asm
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; Copyright (C) 2004,2009 Bernd Porr, Bernd.Porr@f2s.com
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;
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; This program is free software; you can redistribute it and/or modify
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; it under the terms of the GNU General Public License as published by
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; the Free Software Foundation; either version 2 of the License, or
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; (at your option) any later version.
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;
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; This program is distributed in the hope that it will be useful,
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; but WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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; GNU General Public License for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with this program; if not, write to the Free Software
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; Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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;
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;
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; Firmware: usbduxfast_firmware.asm for usbdux.c
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; Description: Firmware for usbduxfast
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; Devices: [ITL] USB-DUX (usbdux.o)
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; Author: Bernd Porr <Bernd.Porr@f2s.com>
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; Updated: 17 Apr 2009
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; Status: stable
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;
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;;;
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;;;
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;;;
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.inc fx2-include.asm
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.equ WFLOADED,70H ; waveform is loaded
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.org 0000h ; after reset the processor starts here
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ljmp main ; jump to the main loop
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.org 0043h ; the IRQ2-vector
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ljmp jmptbl ; irq service-routine
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.org 0100h ; start of the jump table
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jmptbl: ljmp sudav_isr
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nop
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ljmp sof_isr
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nop
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ljmp sutok_isr
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nop
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ljmp suspend_isr
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nop
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ljmp usbreset_isr
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nop
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ljmp hispeed_isr
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nop
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ljmp ep0ack_isr
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nop
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ljmp spare_isr
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nop
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ljmp ep0in_isr
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nop
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ljmp ep0out_isr
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nop
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ljmp ep1in_isr
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nop
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ljmp ep1out_isr
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nop
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ljmp ep2_isr
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nop
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ljmp ep4_isr
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nop
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ljmp ep6_isr
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nop
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ljmp ep8_isr
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nop
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ljmp ibn_isr
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nop
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ljmp spare_isr
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nop
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ljmp ep0ping_isr
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nop
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ljmp ep1ping_isr
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nop
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ljmp ep2ping_isr
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nop
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ljmp ep4ping_isr
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nop
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ljmp ep6ping_isr
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nop
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ljmp ep8ping_isr
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nop
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ljmp errlimit_isr
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nop
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ljmp spare_isr
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nop
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ljmp spare_isr
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nop
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ljmp spare_isr
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nop
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ljmp ep2isoerr_isr
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nop
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ljmp ep4isoerr_isr
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nop
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ljmp ep6isoerr_isr
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nop
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ljmp ep8isoerr_isr
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;; dummy isr
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sof_isr:
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sudav_isr:
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sutok_isr:
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suspend_isr:
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usbreset_isr:
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hispeed_isr:
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ep0ack_isr:
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spare_isr:
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ep0in_isr:
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ep0out_isr:
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ep1out_isr:
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ep1in_isr:
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ibn_isr:
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ep0ping_isr:
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ep1ping_isr:
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ep2ping_isr:
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ep4ping_isr:
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ep6ping_isr:
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ep8ping_isr:
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errlimit_isr:
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ep2isoerr_isr:
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ep4isoerr_isr:
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ep6isoerr_isr:
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ep8isoerr_isr:
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ep6_isr:
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ep2_isr:
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ep8_isr:
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push dps
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push dpl
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push dph
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push dpl1
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push dph1
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push acc
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push psw
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;; clear the USB2 irq bit and return
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mov a,EXIF
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clr acc.4
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mov EXIF,a
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pop psw
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pop acc
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pop dph1
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pop dpl1
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pop dph
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pop dpl
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pop dps
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reti
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;;; main program
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;;; basically only initialises the processor and
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;;; then engages in an endless loop
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main:
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mov dptr,#REVCTL
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mov a,#00000011b ; allows skip
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lcall syncdelaywr
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mov DPTR,#CPUCS ; CPU control register
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mov a,#00010000b ; 48Mhz
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lcall syncdelaywr
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mov dptr,#IFCONFIG ; switch on IFCLK signal
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mov a,#10100010b ; gpif, 30MHz
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lcall syncdelaywr
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mov dptr,#FIFORESET
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mov a,#80h
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lcall syncdelaywr
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mov a,#8
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lcall syncdelaywr
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mov a,#2
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lcall syncdelaywr
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mov a,#4
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lcall syncdelaywr
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mov a,#6
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lcall syncdelaywr
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mov a,#0
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lcall syncdelaywr
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mov dptr,#INTSETUP ; IRQ setup register
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mov a,#08h ; enable autovector
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lcall syncdelaywr
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lcall initeps ; init the isochronous data-transfer
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lcall initGPIF
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;;; main loop
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mloop2:
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lcall gpif_run
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sjmp mloop2 ; do nothing. The rest is done by the IRQs
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gpif_run:
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mov a,WFLOADED
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jz no_trig ; do not trigger
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mov a,GPIFTRIG ; GPIF status
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anl a,#80h ; done bit
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jz no_trig ; GPIF busy
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;;; gpif has stopped
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mov a,#06h ; RD,EP6
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mov GPIFTRIG,a
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no_trig:
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ret
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initGPIF:
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mov DPTR,#EP6CFG ; BLK data from here to the host
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mov a,#11100000b ; Valid, quad buffering
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lcall syncdelaywr ; write
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mov dptr,#EP6FIFOCFG
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mov a,#00001001b ; autoin, wordwide
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lcall syncdelaywr
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mov dptr,#EP6AUTOINLENH
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mov a,#00000010b ; 512 bytes
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lcall syncdelaywr ; write
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mov dptr,#EP6AUTOINLENL
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mov a,#00000000b ; 0
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lcall syncdelaywr ; write
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mov dptr,#GPIFWFSELECT
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mov a,#11111100b ; waveform 0 for FIFO RD
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lcall syncdelaywr
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mov dptr,#GPIFCTLCFG
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mov a,#10000000b ; tri state for CTRL
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lcall syncdelaywr
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mov dptr,#GPIFIDLECTL
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mov a,#11111111b ; all CTL outputs high
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lcall syncdelaywr
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mov a,#11111101b ; reset counter
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lcall syncdelaywr
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mov a,#11111111b ; reset to high again
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lcall syncdelaywr
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mov a,#00000010b ; abort when full
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mov dptr,#EP6GPIFFLGSEL
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lcall syncdelaywr
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mov a,#00000001b ; stop when buffer overfl
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mov dptr,#EP6GPIFPDFSTOP
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lcall syncdelaywr
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mov a,#0
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mov dptr,#GPIFREADYCFG
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lcall syncdelaywr
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mov a,#0
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mov dptr,#GPIFIDLECS
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lcall syncdelaywr
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; waveform 1
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; this is a dummy waveform which is used
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; during the upload of another waveform into
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; wavefrom 0
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; it branches directly into the IDLE state
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mov dptr,#0E420H
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mov a,#00111111b ; branch to IDLE
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lcall syncdelaywr
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mov dptr,#0E428H ; opcode
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mov a,#00000001b ; deceision point
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lcall syncdelaywr
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mov dptr,#0E430H
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mov a,#0FFH ; output is high
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lcall syncdelaywr
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mov dptr,#0E438H
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mov a,#0FFH ; logic function
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lcall syncdelaywr
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; signals that no waveform 0 is loaded so far
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mov WFLOADED,#0 ; waveform flag
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ret
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;;; initilise the transfer
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;;; It is assumed that the USB interface is in alternate setting 1
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initeps:
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mov DPTR,#EP4CFG
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mov a,#10100000b ; valid, bulk, out
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lcall syncdelaywr
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mov dptr,#EP4BCL ; "arm" it
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mov a,#00h
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lcall syncdelaywr ; wait until we can write again
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lcall syncdelaywr ; wait
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lcall syncdelaywr ; wait
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mov DPTR,#EP8CFG
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mov a,#0 ; disable EP8, it overlaps with EP6!!
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lcall syncdelaywr
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mov dptr,#EPIE ; interrupt enable
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mov a,#00100000b ; enable irq for ep4
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lcall syncdelaywr ; do it
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mov dptr,#EPIRQ ; clear IRQs
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mov a,#00100100b
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movx @dptr,a
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mov DPTR,#USBIE ; USB int enable register
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mov a,#0 ; SOF etc
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movx @DPTR,a ;
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mov DPTR,#GPIFIE ; GPIF int enable register
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mov a,#0 ; done IRQ
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movx @DPTR,a ;
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mov EIE,#00000001b ; enable INT2 in the 8051's SFR
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mov IE,#80h ; IE, enable all interrupts
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ret
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;;; interrupt-routine for ep4
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;;; receives the channel list and other commands
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ep4_isr:
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push dps
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push dpl
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push dph
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push dpl1
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push dph1
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push acc
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push psw
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push 00h ; R0
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push 01h ; R1
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push 02h ; R2
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push 03h ; R3
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push 04h ; R4
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push 05h ; R5
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push 06h ; R6
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push 07h ; R7
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mov dptr,#0f400h ; FIFO buffer of EP4
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movx a,@dptr ; get the first byte
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mov dptr,#ep4_jmp ; jump table for the different functions
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rl a ; multiply by 2: sizeof sjmp
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jmp @a+dptr ; jump to the jump table
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ep4_jmp:
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sjmp storewaveform ; a=0
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sjmp init_ep6 ; a=1
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init_ep6:
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; stop ep6
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; just now do nothing
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ljmp over_wf
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storewaveform:
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mov WFLOADED,#0 ; waveform flag
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mov dptr,#EP6FIFOCFG
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mov a,#00000000b ;
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lcall syncdelaywr
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mov dptr,#GPIFABORT
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mov a,#0ffh ; abort all transfers
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lcall syncdelaywr
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wait_f_abort:
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mov a,GPIFTRIG ; GPIF status
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anl a,#80h ; done bit
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jz wait_f_abort ; GPIF busy
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mov dptr,#GPIFWFSELECT
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mov a,#11111101b ; select dummy waveform
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movx @dptr,a
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lcall syncdelay
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mov dptr,#FIFORESET
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mov a,#80h ; NAK
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lcall syncdelaywr
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mov a,#6 ; reset EP6
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lcall syncdelaywr
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mov a,#0 ; normal op
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lcall syncdelaywr
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; change to dummy waveform 1
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mov a,#06h ; RD,EP6
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mov GPIFTRIG,a
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; wait a bit
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mov r2,255
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loopx:
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djnz r2,loopx
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; abort waveform if not already so
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mov dptr,#GPIFABORT
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mov a,#0ffh ; abort all transfers
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lcall syncdelaywr
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; wait again
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mov r2,255
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loopx2:
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djnz r2,loopx2
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; check for DONE
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wait_f_abort2:
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mov a,GPIFTRIG ; GPIF status
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anl a,#80h ; done bit
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jz wait_f_abort2 ; GPIF busy
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; upload the new waveform into waveform 0
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mov AUTOPTRH2,#0E4H ; XDATA0H
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lcall syncdelay
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mov AUTOPTRL2,#00H ; XDATA0L
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lcall syncdelay
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mov AUTOPTRH1,#0F4H ; EP4 high
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lcall syncdelay
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mov AUTOPTRL1,#01H ; EP4 low
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lcall syncdelay
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mov AUTOPTRSETUP,#7 ; autoinc and enable
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lcall syncdelay
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mov r2,#20H ; 32 bytes to transfer
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wavetr:
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mov dptr,#XAUTODAT1
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movx a,@dptr
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lcall syncdelay
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mov dptr,#XAUTODAT2
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movx @dptr,a
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lcall syncdelay
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djnz r2,wavetr
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mov dptr,#EP6FIFOCFG
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mov a,#00001001b ; autoin, wordwide
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lcall syncdelaywr
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mov dptr,#GPIFWFSELECT
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mov a,#11111100b
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movx @dptr,a
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lcall syncdelay
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mov dptr,#FIFORESET
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mov a,#80h ; NAK
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lcall syncdelaywr
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mov a,#6 ; reset EP6
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lcall syncdelaywr
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mov a,#0 ; normal op
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lcall syncdelaywr
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mov dptr,#0E400H+10H; waveform 0: first CTL byte
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movx a,@dptr ; get it
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orl a,#11111011b ; force all bits to one except the range bit
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mov dptr,#GPIFIDLECTL
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lcall syncdelaywr
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mov WFLOADED,#1 ; waveform flag
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; do the common things here
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over_wf:
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mov dptr,#EP4BCL
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mov a,#00h
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movx @DPTR,a ; arm it
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lcall syncdelay ; wait
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movx @DPTR,a ; arm it
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lcall syncdelay ; wait
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;; clear INT2
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mov a,EXIF ; FIRST clear the USB (INT2) interrupt request
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clr acc.4
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mov EXIF,a ; Note: EXIF reg is not 8051 bit-addressable
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mov DPTR,#EPIRQ ;
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mov a,#00100000b ; clear the ep4irq
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movx @DPTR,a
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pop 07h
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pop 06h
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pop 05h
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pop 04h ; R4
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pop 03h ; R3
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pop 02h ; R2
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pop 01h ; R1
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pop 00h ; R0
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pop psw
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pop acc
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pop dph1
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pop dpl1
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pop dph
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pop dpl
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pop dps
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reti
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;; need to delay every time the byte counters
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;; for the EPs have been changed.
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syncdelay:
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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ret
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syncdelaywr:
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lcall syncdelay
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movx @dptr,a
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ret
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.End
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