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lavc/vc1dsp: R-V V vc1_inv_trans_4x4
T-Head C908 (cycles): vc1dsp.vc1_inv_trans_4x4_c: 310.7 vc1dsp.vc1_inv_trans_4x4_rvv_i32: 120.0 We could use 1 `vlseg4e64.v` instead of 4 `vle16.v`, but that seems to be about 7% slower.
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@ -32,6 +32,7 @@ void ff_vc1_inv_trans_4x8_rvv(uint8_t *dest, ptrdiff_t stride, int16_t *block);
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void ff_vc1_inv_trans_8x4_dc_rvv(uint8_t *dest, ptrdiff_t stride, int16_t *block);
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void ff_vc1_inv_trans_8x4_rvv(uint8_t *dest, ptrdiff_t stride, int16_t *block);
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void ff_vc1_inv_trans_4x4_dc_rvv(uint8_t *dest, ptrdiff_t stride, int16_t *block);
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void ff_vc1_inv_trans_4x4_rvv(uint8_t *dest, ptrdiff_t stride, int16_t *block);
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void ff_put_pixels16x16_rvi(uint8_t *dst, const uint8_t *src, ptrdiff_t line_size, int rnd);
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void ff_put_pixels8x8_rvi(uint8_t *dst, const uint8_t *src, ptrdiff_t line_size, int rnd);
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void ff_avg_pixels16x16_rvv(uint8_t *dst, const uint8_t *src, ptrdiff_t line_size, int rnd);
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@ -59,6 +60,7 @@ av_cold void ff_vc1dsp_init_riscv(VC1DSPContext *dsp)
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dsp->vc1_inv_trans_8x8 = ff_vc1_inv_trans_8x8_rvv;
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dsp->vc1_inv_trans_8x4 = ff_vc1_inv_trans_8x4_rvv;
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dsp->vc1_inv_trans_4x8 = ff_vc1_inv_trans_4x8_rvv;
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dsp->vc1_inv_trans_4x4 = ff_vc1_inv_trans_4x4_rvv;
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dsp->vc1_inv_trans_4x8_dc = ff_vc1_inv_trans_4x8_dc_rvv;
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dsp->vc1_inv_trans_4x4_dc = ff_vc1_inv_trans_4x4_dc_rvv;
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dsp->avg_vc1_mspel_pixels_tab[0][0] = ff_avg_pixels16x16_rvv;
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@ -373,6 +373,51 @@ func ff_vc1_inv_trans_4x8_rvv, zve32x
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ret
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endfunc
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func ff_vc1_inv_trans_4x4_rvv, zve32x
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li a3, 8 * 2
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csrwi vxrm, 0
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vsetivli zero, 4, e16, mf2, ta, ma
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vlsseg4e16.v v0, (a2), a3
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li t1, 3
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jal t0, ff_vc1_inv_trans_4_rvv
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vsseg4e16.v v0, (a2)
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addi t1, a2, 1 * 4 * 2
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vle16.v v0, (a2)
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addi t2, a2, 2 * 4 * 2
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vle16.v v1, (t1)
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addi t3, a2, 3 * 4 * 2
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vle16.v v2, (t2)
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vle16.v v3, (t3)
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li t1, 7
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jal t0, ff_vc1_inv_trans_4_rvv
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add t1, a1, a0
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vle8.v v8, (a0)
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add t2, a1, t1
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vle8.v v9, (t1)
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add t3, a1, t2
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vle8.v v10, (t2)
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vle8.v v11, (t3)
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vsetvli zero, zero, e8, mf4, ta, ma
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vwaddu.wv v0, v0, v8
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vwaddu.wv v1, v1, v9
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vwaddu.wv v2, v2, v10
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vwaddu.wv v3, v3, v11
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vsetvli zero, zero, e16, mf2, ta, ma
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.irp n,0,1,2,3
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vmax.vx v\n, v\n, zero
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.endr
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vsetvli zero, zero, e8, mf4, ta, ma
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vnclipu.wi v8, v0, 0
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vnclipu.wi v9, v1, 0
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vse8.v v8, (a0)
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vnclipu.wi v10, v2, 0
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vse8.v v9, (t1)
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vnclipu.wi v11, v3, 0
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vse8.v v10, (t2)
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vse8.v v11, (t3)
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ret
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endfunc
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.macro mspel_op op pos n1 n2
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add t1, \pos, a2
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v\op\()e8.v v\n1, (\pos)
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