66 lines
1.5 KiB
Diff
66 lines
1.5 KiB
Diff
>From d0557763b0713a4c006bd2405eede3924569cafd Mon Sep 17 00:00:00 2001
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From: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
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Date: Mon, 5 Jul 2010 11:28:49 +0100
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Subject: [PATCH 2/2] Fix PR44392
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---
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gcc/config/arm/arm.md | 43 +++++++++++++++++++------------------------
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1 files changed, 19 insertions(+), 24 deletions(-)
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--- a/gcc/config/arm/arm.md
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+++ b/gcc/config/arm/arm.md
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@@ -11523,34 +11523,29 @@
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(define_expand "bswapsi2"
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[(set (match_operand:SI 0 "s_register_operand" "=r")
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(bswap:SI (match_operand:SI 1 "s_register_operand" "r")))]
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-"TARGET_EITHER"
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+"TARGET_EITHER && (arm_arch6 || !optimize_size)"
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"
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- if (!arm_arch6)
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- {
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- if (!optimize_size)
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- {
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- rtx op2 = gen_reg_rtx (SImode);
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- rtx op3 = gen_reg_rtx (SImode);
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+ if (!arm_arch6)
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+ {
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+ rtx op2 = gen_reg_rtx (SImode);
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+ rtx op3 = gen_reg_rtx (SImode);
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- if (TARGET_THUMB)
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- {
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- rtx op4 = gen_reg_rtx (SImode);
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- rtx op5 = gen_reg_rtx (SImode);
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+ if (TARGET_THUMB)
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+ {
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+ rtx op4 = gen_reg_rtx (SImode);
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+ rtx op5 = gen_reg_rtx (SImode);
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- emit_insn (gen_thumb_legacy_rev (operands[0], operands[1],
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- op2, op3, op4, op5));
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- }
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- else
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- {
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- emit_insn (gen_arm_legacy_rev (operands[0], operands[1],
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- op2, op3));
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- }
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+ emit_insn (gen_thumb_legacy_rev (operands[0], operands[1],
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+ op2, op3, op4, op5));
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+ }
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+ else
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+ {
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+ emit_insn (gen_arm_legacy_rev (operands[0], operands[1],
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+ op2, op3));
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+ }
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- DONE;
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- }
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- else
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- FAIL;
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- }
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+ DONE;
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+ }
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"
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)
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