Felix Fietkau 58e049ea80 ar71xx: ethernet: reduce tx and rx DMA ring size to improve cache footprint ... 256 entries is a bit excessive, even for gigabit speeds Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 37762		2013-08-12 17:26:03 +00:00
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gpio
leds
mtd
net	ar71xx: ethernet: reduce tx and rx DMA ring size to improve cache footprint	2013-08-12 17:26:03 +00:00
spi