257 lines
6.6 KiB
C
257 lines
6.6 KiB
C
/*
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<:copyright-gpl
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Copyright 2002 Broadcom Corp. All Rights Reserved.
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This program is free software; you can distribute it and/or modify it
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under the terms of the GNU General Public License (Version 2) as
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published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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:>
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*/
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/*
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* Interrupt control functions for Broadcom 963xx MIPS boards
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*/
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#include <asm/atomic.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <asm/irq.h>
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#include <asm/mipsregs.h>
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#include <asm/addrspace.h>
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#include <asm/signal.h>
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#include <bcm_map_part.h>
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#include <bcm_intr.h>
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static void irq_dispatch_int(struct pt_regs *regs)
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{
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unsigned int pendingIrqs;
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static unsigned int irqBit;
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static unsigned int isrNumber = 31;
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pendingIrqs = PERF->IrqStatus & PERF->IrqMask;
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if (!pendingIrqs) {
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return;
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}
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while (1) {
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irqBit <<= 1;
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isrNumber++;
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if (isrNumber == 32) {
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isrNumber = 0;
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irqBit = 0x1;
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}
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if (pendingIrqs & irqBit) {
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PERF->IrqMask &= ~irqBit; // mask
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do_IRQ(isrNumber + INTERNAL_ISR_TABLE_OFFSET);
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break;
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}
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}
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}
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static void irq_dispatch_ext(uint32 irq)
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{
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if (!(PERF->ExtIrqCfg & (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT)))) {
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printk("**** Ext IRQ mask. Should not dispatch ****\n");
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}
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/* disable and clear interrupt in the controller */
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PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT));
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PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
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do_IRQ(irq);
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}
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extern void brcm_timer_interrupt(struct pt_regs *regs);
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asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
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{
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u32 cause;
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while((cause = (read_c0_cause()& CAUSEF_IP))) {
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if (cause & CAUSEF_IP7)
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brcm_timer_interrupt(regs);
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else if (cause & CAUSEF_IP2)
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irq_dispatch_int(regs);
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else if (cause & CAUSEF_IP3)
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irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_0);
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else if (cause & CAUSEF_IP4)
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irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_1);
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else if (cause & CAUSEF_IP5)
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irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_2);
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else if (cause & CAUSEF_IP6)
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irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_3);
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local_irq_disable();
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}
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}
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void enable_brcm_irq(unsigned int irq)
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{
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unsigned long flags;
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local_irq_save(flags);
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if( irq >= INTERNAL_ISR_TABLE_OFFSET ) {
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PERF->IrqMask |= (1 << (irq - INTERNAL_ISR_TABLE_OFFSET));
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}
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else if (irq >= INTERRUPT_ID_EXTERNAL_0 && irq <= INTERRUPT_ID_EXTERNAL_3) {
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/* enable and clear interrupt in the controller */
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PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT));
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PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
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}
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local_irq_restore(flags);
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}
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void disable_brcm_irq(unsigned int irq)
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{
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unsigned long flags;
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local_irq_save(flags);
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if( irq >= INTERNAL_ISR_TABLE_OFFSET ) {
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PERF->IrqMask &= ~(1 << (irq - INTERNAL_ISR_TABLE_OFFSET));
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}
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else if (irq >= INTERRUPT_ID_EXTERNAL_0 && irq <= INTERRUPT_ID_EXTERNAL_3) {
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/* disable interrupt in the controller */
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PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
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}
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local_irq_restore(flags);
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}
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void ack_brcm_irq(unsigned int irq)
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{
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/* Already done in brcm_irq_dispatch */
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}
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unsigned int startup_brcm_irq(unsigned int irq)
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{
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enable_brcm_irq(irq);
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return 0; /* never anything pending */
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}
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unsigned int startup_brcm_none(unsigned int irq)
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{
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return 0;
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}
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void end_brcm_irq(unsigned int irq)
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{
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if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
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enable_brcm_irq(irq);
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}
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void end_brcm_none(unsigned int irq)
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{
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}
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static struct hw_interrupt_type brcm_irq_type = {
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.typename = "MIPS",
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.startup = startup_brcm_irq,
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.shutdown = disable_brcm_irq,
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.enable = enable_brcm_irq,
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.disable = disable_brcm_irq,
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.ack = ack_brcm_irq,
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.end = end_brcm_irq,
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.set_affinity = NULL
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};
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static struct hw_interrupt_type brcm_irq_no_end_type = {
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.typename = "MIPS",
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.startup = startup_brcm_none,
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.shutdown = disable_brcm_irq,
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.enable = enable_brcm_irq,
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.disable = disable_brcm_irq,
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.ack = ack_brcm_irq,
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.end = end_brcm_none,
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.set_affinity = NULL
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};
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void __init arch_init_irq(void)
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{
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int i;
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clear_c0_status(ST0_BEV);
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change_c0_status(ST0_IM, (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4));
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for (i = 0; i < NR_IRQS; i++) {
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irq_desc[i].status = IRQ_DISABLED;
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irq_desc[i].action = 0;
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irq_desc[i].depth = 1;
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irq_desc[i].chip = &brcm_irq_type;
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}
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}
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int request_external_irq(unsigned int irq,
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FN_HANDLER handler,
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unsigned long irqflags,
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const char * devname,
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void *dev_id)
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{
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unsigned long flags;
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local_irq_save(flags);
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PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT)); // Clear
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PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT)); // Mask
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PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_INSENS_SHFT)); // Edge insesnsitive
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PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_LEVEL_SHFT)); // Level triggered
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PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_SENSE_SHFT)); // Low level
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local_irq_restore(flags);
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return( request_irq(irq, handler, irqflags, devname, dev_id) );
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}
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/* VxWorks compatibility function(s). */
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unsigned int BcmHalMapInterrupt(FN_HANDLER pfunc, unsigned int param,
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unsigned int interruptId)
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{
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int nRet = -1;
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char *devname;
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devname = kmalloc(16, GFP_KERNEL);
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if (devname)
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sprintf( devname, "brcm_%d", interruptId );
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/* Set the IRQ description to not automatically enable the interrupt at
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* the end of an ISR. The driver that handles the interrupt must
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* explicitly call BcmHalInterruptEnable or enable_brcm_irq. This behavior
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* is consistent with interrupt handling on VxWorks.
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*/
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irq_desc[interruptId].chip = &brcm_irq_no_end_type;
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if( interruptId >= INTERNAL_ISR_TABLE_OFFSET )
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{
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nRet = request_irq( interruptId, pfunc, SA_SAMPLE_RANDOM | SA_INTERRUPT,
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devname, (void *) param );
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}
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else if (interruptId >= INTERRUPT_ID_EXTERNAL_0 && interruptId <= INTERRUPT_ID_EXTERNAL_3)
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{
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nRet = request_external_irq( interruptId, pfunc, SA_SAMPLE_RANDOM | SA_INTERRUPT,
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devname, (void *) param );
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}
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return( nRet );
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}
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EXPORT_SYMBOL(enable_brcm_irq);
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EXPORT_SYMBOL(disable_brcm_irq);
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EXPORT_SYMBOL(request_external_irq);
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EXPORT_SYMBOL(BcmHalMapInterrupt);
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