generic: ar8216: add sgmii_delay_en field to ar8327_platform_data

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

SVN-Revision: 34881
This commit is contained in:
Gabor Juhos 2012-12-25 18:45:31 +00:00
parent 1dc2b6e8fa
commit d4b4c7d102
3 changed files with 5 additions and 0 deletions

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@ -917,6 +917,9 @@ ar8327_get_pad_cfg(struct ar8327_pad_cfg *cfg)
if (cfg->txclk_delay_en) if (cfg->txclk_delay_en)
t |= AR8327_PAD_RGMII_TXCLK_DELAY_EN; t |= AR8327_PAD_RGMII_TXCLK_DELAY_EN;
if (cfg->sgmii_delay_en)
t |= AR8327_PAD_SGMII_DELAY_EN;
break; break;
case AR8327_PAD_MAC2PHY_MII: case AR8327_PAD_MAC2PHY_MII:

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@ -281,6 +281,7 @@
#define AR8327_PAD_PHYX_GMII_EN BIT(16) #define AR8327_PAD_PHYX_GMII_EN BIT(16)
#define AR8327_PAD_PHYX_RGMII_EN BIT(17) #define AR8327_PAD_PHYX_RGMII_EN BIT(17)
#define AR8327_PAD_PHYX_MII_EN BIT(18) #define AR8327_PAD_PHYX_MII_EN BIT(18)
#define AR8327_PAD_SGMII_DELAY_EN BIT(19)
#define AR8327_PAD_RGMII_RXCLK_DELAY_SEL BITS(20, 2) #define AR8327_PAD_RGMII_RXCLK_DELAY_SEL BITS(20, 2)
#define AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S 20 #define AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S 20
#define AR8327_PAD_RGMII_TXCLK_DELAY_SEL BITS(22, 2) #define AR8327_PAD_RGMII_TXCLK_DELAY_SEL BITS(22, 2)

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@ -44,6 +44,7 @@ struct ar8327_pad_cfg {
bool pipe_rxclk_sel; bool pipe_rxclk_sel;
bool txclk_delay_en; bool txclk_delay_en;
bool rxclk_delay_en; bool rxclk_delay_en;
bool sgmii_delay_en;
enum ar8327_clk_delay_sel txclk_delay_sel; enum ar8327_clk_delay_sel txclk_delay_sel;
enum ar8327_clk_delay_sel rxclk_delay_sel; enum ar8327_clk_delay_sel rxclk_delay_sel;
}; };