generic: ar8216: add sgmii_delay_en field to ar8327_platform_data
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 34881
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@ -917,6 +917,9 @@ ar8327_get_pad_cfg(struct ar8327_pad_cfg *cfg)
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if (cfg->txclk_delay_en)
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if (cfg->txclk_delay_en)
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t |= AR8327_PAD_RGMII_TXCLK_DELAY_EN;
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t |= AR8327_PAD_RGMII_TXCLK_DELAY_EN;
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if (cfg->sgmii_delay_en)
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t |= AR8327_PAD_SGMII_DELAY_EN;
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break;
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break;
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case AR8327_PAD_MAC2PHY_MII:
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case AR8327_PAD_MAC2PHY_MII:
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@ -281,6 +281,7 @@
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#define AR8327_PAD_PHYX_GMII_EN BIT(16)
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#define AR8327_PAD_PHYX_GMII_EN BIT(16)
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#define AR8327_PAD_PHYX_RGMII_EN BIT(17)
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#define AR8327_PAD_PHYX_RGMII_EN BIT(17)
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#define AR8327_PAD_PHYX_MII_EN BIT(18)
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#define AR8327_PAD_PHYX_MII_EN BIT(18)
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#define AR8327_PAD_SGMII_DELAY_EN BIT(19)
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#define AR8327_PAD_RGMII_RXCLK_DELAY_SEL BITS(20, 2)
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#define AR8327_PAD_RGMII_RXCLK_DELAY_SEL BITS(20, 2)
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#define AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S 20
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#define AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S 20
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#define AR8327_PAD_RGMII_TXCLK_DELAY_SEL BITS(22, 2)
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#define AR8327_PAD_RGMII_TXCLK_DELAY_SEL BITS(22, 2)
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@ -44,6 +44,7 @@ struct ar8327_pad_cfg {
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bool pipe_rxclk_sel;
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bool pipe_rxclk_sel;
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bool txclk_delay_en;
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bool txclk_delay_en;
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bool rxclk_delay_en;
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bool rxclk_delay_en;
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bool sgmii_delay_en;
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enum ar8327_clk_delay_sel txclk_delay_sel;
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enum ar8327_clk_delay_sel txclk_delay_sel;
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enum ar8327_clk_delay_sel rxclk_delay_sel;
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enum ar8327_clk_delay_sel rxclk_delay_sel;
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};
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};
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