ar71xx: introduce global ar724x_pci_ctrl_base variable
SVN-Revision: 20284
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b051a3b784
commit
d02975eb0d
@ -30,38 +30,25 @@
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static void __iomem *ar724x_pci_localcfg_base;
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static void __iomem *ar724x_pci_devcfg_base;
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static void __iomem *ar724x_pci_ctrl_base;
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static int ar724x_pci_fixup_enable;
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static DEFINE_SPINLOCK(ar724x_pci_lock);
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static inline void ar724x_pci_wr(unsigned reg, u32 val)
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{
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void __iomem *base;
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base = ioremap_nocache(AR724X_PCI_CTRL_BASE, AR724X_PCI_CTRL_SIZE);
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__raw_writel(val, base + reg);
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(void) __raw_readl(base + reg);
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iounmap(base);
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__raw_writel(val, ar724x_pci_ctrl_base + reg);
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(void) __raw_readl(ar724x_pci_ctrl_base + reg);
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}
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static inline void ar724x_pci_wr_nf(unsigned reg, u32 val)
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{
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void __iomem *base;
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base = ioremap_nocache(AR724X_PCI_CTRL_BASE, AR724X_PCI_CTRL_SIZE);
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__raw_writel(val, base + reg);
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iounmap(base);
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__raw_writel(val, ar724x_pci_ctrl_base + reg);
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}
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static inline u32 ar724x_pci_rr(unsigned reg)
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{
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void __iomem *base;
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u32 ret;
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base = ioremap_nocache(AR724X_PCI_CTRL_BASE, AR724X_PCI_CTRL_SIZE);
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ret = __raw_readl(base + reg);
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iounmap(base);
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return ret;
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return __raw_readl(ar724x_pci_ctrl_base + reg);
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}
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static void ar724x_pci_read(void __iomem *base, int where, int size, u32 *value)
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@ -368,10 +355,15 @@ int __init ar724x_pcibios_init(void)
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if (ar724x_pci_devcfg_base == NULL)
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goto err_unmap_localcfg;
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ar724x_pci_ctrl_base = ioremap_nocache(AR724X_PCI_CTRL_BASE,
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AR724X_PCI_CTRL_SIZE);
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if (ar724x_pci_ctrl_base == NULL)
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goto err_unmap_devcfg;
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ar724x_pci_reset();
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ret = ar724x_pci_setup();
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if (ret)
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goto err_unmap_devcfg;
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goto err_unmap_ctrl;
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ar724x_pci_fixup_enable = 1;
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ar724x_pci_irq_init();
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@ -379,7 +371,9 @@ int __init ar724x_pcibios_init(void)
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return 0;
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err_unmap_devcfg:
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err_unmap_ctrl:
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iounmap(ar724x_pci_ctrl_base);
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err_unmap_devcfg:
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iounmap(ar724x_pci_devcfg_base);
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err_unmap_localcfg:
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iounmap(ar724x_pci_localcfg_base);
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