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more USB driver fixes [http://openwrt.pastebin.ca/768610 bootlog :)]

Browse Source 
SVN-Revision: 9530
This commit is contained in:
Gabor Juhos 2007-11-10 19:20:47 +00:00
parent 658fcd6cf3
commit 98f43a2494
6 changed files with 226 additions and 159 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
target/linux/adm5120/files/drivers/usb/host/adm5120-dbg.c
View File

@ -243,7 +243,7 @@ admhc_dump_roothub(
{ {
u32 temp, i; u32 temp, i;
temp = admhc_get_rhdesc(ahcd); temp = admhc_read_rhdesc(ahcd);
if (temp == ~(u32)0) if (temp == ~(u32)0)
return; return;
@ -267,7 +267,7 @@ admhc_dump_roothub(
} }
for (i = 0; i < ahcd->num_ports; i++) { for (i = 0; i < ahcd->num_ports; i++) {
temp = admhc_get_portstatus(ahcd, i); temp = admhc_read_portstatus(ahcd, i);
dbg_port_sw(ahcd, i, temp, next, size); dbg_port_sw(ahcd, i, temp, next, size);
} }
} }

2
target/linux/adm5120/files/drivers/usb/host/adm5120-drv.c
View File

@ -22,7 +22,7 @@
#include <linux/signal.h> #include <linux/signal.h>
#include <asm/bootinfo.h> #include <asm/bootinfo.h>
#include <asm/mach-adm5120/adm5120_defs.h> #include <adm5120_defs.h>
#ifdef DEBUG #ifdef DEBUG
#define HCD_DBG(f, a...) printk(KERN_DEBUG "%s: " f, hcd_name, ## a) #define HCD_DBG(f, a...) printk(KERN_DEBUG "%s: " f, hcd_name, ## a)

25
target/linux/adm5120/files/drivers/usb/host/adm5120-hcd.c
View File

@ -45,13 +45,14 @@
#include "../core/hcd.h" #include "../core/hcd.h"
#include "../core/hub.h" #include "../core/hub.h"
#define DRIVER_VERSION "v0.03" #define DRIVER_VERSION "v0.04"
#define DRIVER_AUTHOR "Gabor Juhos <juhosg at openwrt.org>" #define DRIVER_AUTHOR "Gabor Juhos <juhosg at openwrt.org>"
#define DRIVER_DESC "ADMtek USB 1.1 Host Controller Driver" #define DRIVER_DESC "ADMtek USB 1.1 Host Controller Driver"
/*-------------------------------------------------------------------------*/ /*-------------------------------------------------------------------------*/
#define ADMHC_VERBOSE_DEBUG /* not always helpful */ #define ADMHC_VERBOSE_DEBUG /* not always helpful */
#define ADMHC_POLL_RH
#undef ADMHC_LOCK_DMA #undef ADMHC_LOCK_DMA
/* For initializing controller (mask in an HCFS mode too) */ /* For initializing controller (mask in an HCFS mode too) */
@ -349,7 +350,7 @@ static int admhc_get_frame_number(struct usb_hcd *hcd)
static void admhc_usb_reset(struct admhcd *ahcd) static void admhc_usb_reset(struct admhcd *ahcd)
{ {
ahcd->host_control = ADMHC_BUSS_RESET; ahcd->host_control = ADMHC_BUSS_RESET;
admhc_writel(ahcd, ahcd->host_control ,&ahcd->regs->host_control); admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
} }
/* admhc_shutdown forcibly disables IRQs and DMA, helping kexec and /* admhc_shutdown forcibly disables IRQs and DMA, helping kexec and
@ -466,7 +467,7 @@ static int admhc_init(struct admhcd *ahcd)
/* Read the number of ports unless overridden */ /* Read the number of ports unless overridden */
if (ahcd->num_ports == 0) if (ahcd->num_ports == 0)
ahcd->num_ports = admhc_get_rhdesc(ahcd) & ADMHC_RH_NUMP; ahcd->num_ports = admhc_read_rhdesc(ahcd) & ADMHC_RH_NUMP;
ret = admhc_mem_init(ahcd); ret = admhc_mem_init(ahcd);
if (ret) if (ret)
@ -531,18 +532,16 @@ static int admhc_run(struct admhcd *ahcd)
admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control); admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
msleep(temp); msleep(temp);
temp = admhc_get_rhdesc(ahcd); temp = admhc_read_rhdesc(ahcd);
if (!(temp & ADMHC_RH_NPS)) { if (!(temp & ADMHC_RH_NPS)) {
/* power down each port */ /* power down each port */
for (temp = 0; temp < ahcd->num_ports; temp++) for (temp = 0; temp < ahcd->num_ports; temp++)
admhc_writel(ahcd, ADMHC_PS_CPP, admhc_write_portstatus(ahcd, temp, ADMHC_PS_CPP);
&ahcd->regs->portstatus[temp]);
} }
/* 2msec timelimit here means no irqs/preempt */ /* 2msec timelimit here means no irqs/preempt */
spin_lock_irq(&ahcd->lock); spin_lock_irq(&ahcd->lock);
retry:
admhc_writel(ahcd, ADMHC_CTRL_SR, &ahcd->regs->gencontrol); admhc_writel(ahcd, ADMHC_CTRL_SR, &ahcd->regs->gencontrol);
temp = 30; /* ... allow extra time */ temp = 30; /* ... allow extra time */
while ((admhc_readl(ahcd, &ahcd->regs->gencontrol) & ADMHC_CTRL_SR) != 0) { while ((admhc_readl(ahcd, &ahcd->regs->gencontrol) & ADMHC_CTRL_SR) != 0) {
@ -615,25 +614,23 @@ static irqreturn_t admhc_irq(struct usb_hcd *hcd)
u32 ints; u32 ints;
ints = admhc_readl(ahcd, &regs->int_status); ints = admhc_readl(ahcd, &regs->int_status);
if ((ints & ADMHC_INTR_INTA) == 0) { if (!(ints & ADMHC_INTR_INTA))
/* no unmasked interrupt status is set */ /* no unmasked interrupt status is set */
return IRQ_NONE; return IRQ_NONE;
}
ints &= admhc_readl(ahcd, &regs->int_enable); ints &= admhc_readl(ahcd, &regs->int_enable);
if (!ints)
return IRQ_NONE;
if (ints & ADMHC_INTR_FATI) { if (ints & ADMHC_INTR_FATI) {
/* e.g. due to PCI Master/Target Abort */
admhc_disable(ahcd); admhc_disable(ahcd);
admhc_err(ahcd, "Fatal Error, controller disabled\n"); admhc_err(ahcd, "Fatal Error, controller disabled\n");
admhc_dump(ahcd, 1);
admhc_usb_reset(ahcd); admhc_usb_reset(ahcd);
} }
if (ints & ADMHC_INTR_BABI) { if (ints & ADMHC_INTR_BABI) {
admhc_intr_disable(ahcd, ADMHC_INTR_MIE);
admhc_err(ahcd, "Babble Detected\n");
admhc_disable(ahcd); admhc_disable(ahcd);
admhc_err(ahcd, "Babble Detected\n");
admhc_usb_reset(ahcd); admhc_usb_reset(ahcd);
} }
@ -711,7 +708,7 @@ static void admhc_stop(struct usb_hcd *hcd)
flush_scheduled_work(); flush_scheduled_work();
admhc_usb_reset(ahcd); admhc_usb_reset(ahcd);
admhc_intr_disable(ahcd, ADMHC_INTR_MIE); admhc_intr_disable(ahcd, ~0);
free_irq(hcd->irq, hcd); free_irq(hcd->irq, hcd);
hcd->irq = -1; hcd->irq = -1;

333
target/linux/adm5120/files/drivers/usb/host/adm5120-hub.c
View File

@ -17,42 +17,42 @@
admhc_dbg(hc, \ admhc_dbg(hc, \
"%s port%d " \ "%s port%d " \
"= 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \ "= 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \
label, num, temp, \ label, num, value, \
(temp & ADMHC_PS_PRSC) ? " PRSC" : "", \ (value & ADMHC_PS_PRSC) ? " PRSC" : "", \
(temp & ADMHC_PS_OCIC) ? " OCIC" : "", \ (value & ADMHC_PS_OCIC) ? " OCIC" : "", \
(temp & ADMHC_PS_PSSC) ? " PSSC" : "", \ (value & ADMHC_PS_PSSC) ? " PSSC" : "", \
(temp & ADMHC_PS_PESC) ? " PESC" : "", \ (value & ADMHC_PS_PESC) ? " PESC" : "", \
(temp & ADMHC_PS_CSC) ? " CSC" : "", \ (value & ADMHC_PS_CSC) ? " CSC" : "", \
\ \
(temp & ADMHC_PS_LSDA) ? " LSDA" : "", \ (value & ADMHC_PS_LSDA) ? " LSDA" : "", \
(temp & ADMHC_PS_PPS) ? " PPS" : "", \ (value & ADMHC_PS_PPS) ? " PPS" : "", \
(temp & ADMHC_PS_PRS) ? " PRS" : "", \ (value & ADMHC_PS_PRS) ? " PRS" : "", \
(temp & ADMHC_PS_POCI) ? " POCI" : "", \ (value & ADMHC_PS_POCI) ? " POCI" : "", \
(temp & ADMHC_PS_PSS) ? " PSS" : "", \ (value & ADMHC_PS_PSS) ? " PSS" : "", \
\ \
(temp & ADMHC_PS_PES) ? " PES" : "", \ (value & ADMHC_PS_PES) ? " PES" : "", \
(temp & ADMHC_PS_CCS) ? " CCS" : "" \ (value & ADMHC_PS_CCS) ? " CCS" : "" \
); );
#define dbg_port_write(hc,label,num,value) \ #define dbg_port_write(hc,label,num,value) \
admhc_dbg(hc, \ admhc_dbg(hc, \
"%s port%d " \ "%s port%d " \
"= 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \ "= 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \
label, num, temp, \ label, num, value, \
(temp & ADMHC_PS_PRSC) ? " PRSC" : "", \ (value & ADMHC_PS_PRSC) ? " PRSC" : "", \
(temp & ADMHC_PS_OCIC) ? " OCIC" : "", \ (value & ADMHC_PS_OCIC) ? " OCIC" : "", \
(temp & ADMHC_PS_PSSC) ? " PSSC" : "", \ (value & ADMHC_PS_PSSC) ? " PSSC" : "", \
(temp & ADMHC_PS_PESC) ? " PESC" : "", \ (value & ADMHC_PS_PESC) ? " PESC" : "", \
(temp & ADMHC_PS_CSC) ? " CSC" : "", \ (value & ADMHC_PS_CSC) ? " CSC" : "", \
\ \
(temp & ADMHC_PS_CPP) ? " CPP" : "", \ (value & ADMHC_PS_CPP) ? " CPP" : "", \
(temp & ADMHC_PS_SPP) ? " SPP" : "", \ (value & ADMHC_PS_SPP) ? " SPP" : "", \
(temp & ADMHC_PS_SPR) ? " SPR" : "", \ (value & ADMHC_PS_SPR) ? " SPR" : "", \
(temp & ADMHC_PS_CPS) ? " CPS" : "", \ (value & ADMHC_PS_CPS) ? " CPS" : "", \
(temp & ADMHC_PS_SPS) ? " SPS" : "", \ (value & ADMHC_PS_SPS) ? " SPS" : "", \
\ \
(temp & ADMHC_PS_SPE) ? " SPE" : "", \ (value & ADMHC_PS_SPE) ? " SPE" : "", \
(temp & ADMHC_PS_CPE) ? " CPE" : "" \ (value & ADMHC_PS_CPE) ? " CPE" : "" \
); );
/*-------------------------------------------------------------------------*/ /*-------------------------------------------------------------------------*/
@ -87,7 +87,7 @@ admhc_hub_status_data(struct usb_hcd *hcd, char *buf)
goto done; goto done;
/* init status */ /* init status */
status = admhc_get_rhdesc(ahcd); status = admhc_read_rhdesc(ahcd);
if (status & (ADMHC_RH_LPSC | ADMHC_RH_OCIC)) if (status & (ADMHC_RH_LPSC | ADMHC_RH_OCIC))
buf [0] = changed = 1; buf [0] = changed = 1;
else else
@ -99,7 +99,7 @@ admhc_hub_status_data(struct usb_hcd *hcd, char *buf)
/* look at each port */ /* look at each port */
for (i = 0; i < ahcd->num_ports; i++) { for (i = 0; i < ahcd->num_ports; i++) {
status = admhc_get_portstatus(ahcd, i); status = admhc_read_portstatus(ahcd, i);
/* can't autostop if ports are connected */ /* can't autostop if ports are connected */
any_connected |= (status & ADMHC_PS_CCS); any_connected |= (status & ADMHC_PS_CCS);
@ -125,15 +125,15 @@ done:
/*-------------------------------------------------------------------------*/ /*-------------------------------------------------------------------------*/
static void admhc_hub_descriptor(struct admhcd *ahcd, static int admhc_get_hub_descriptor(struct admhcd *ahcd, char *buf)
struct usb_hub_descriptor *desc)
{ {
u32 rh = admhc_get_rhdesc(ahcd); struct usb_hub_descriptor *desc = (struct usb_hub_descriptor *)buf;
u16 temp; u32 rh = admhc_read_rhdesc(ahcd);
u16 temp;
desc->bDescriptorType = USB_DT_HUB; /* Hub-descriptor */ desc->bDescriptorType = USB_DT_HUB; /* Hub-descriptor */
desc->bPwrOn2PwrGood = ADMHC_POTPGT/2; /* use default value */ desc->bPwrOn2PwrGood = ADMHC_POTPGT/2; /* use default value */
desc->bHubContrCurrent = 0x00; /* 0mA */ desc->bHubContrCurrent = 0x00; /* 0mA */
desc->bNbrPorts = ahcd->num_ports; desc->bNbrPorts = ahcd->num_ports;
temp = 1 + (ahcd->num_ports / 8); temp = 1 + (ahcd->num_ports / 8);
@ -152,8 +152,58 @@ static void admhc_hub_descriptor(struct admhcd *ahcd,
desc->wHubCharacteristics = (__force __u16)cpu_to_hc16(ahcd, temp); desc->wHubCharacteristics = (__force __u16)cpu_to_hc16(ahcd, temp);
/* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */ /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
desc->bitmap [0] = 0; desc->bitmap[0] = 0;
desc->bitmap [0] = ~0; desc->bitmap[0] = ~0;
return 0;
}
static int admhc_get_hub_status(struct admhcd *ahcd, char *buf)
{
struct usb_hub_status *hs = (struct usb_hub_status *)buf;
u32 t = admhc_read_rhdesc(ahcd);
u16 status, change;
status = 0;
status |= (t & ADMHC_RH_LPS) ? HUB_STATUS_LOCAL_POWER : 0;
status |= (t & ADMHC_RH_OCI) ? HUB_STATUS_OVERCURRENT : 0;
change = 0;
change |= (t & ADMHC_RH_LPSC) ? HUB_CHANGE_LOCAL_POWER : 0;
change |= (t & ADMHC_RH_OCIC) ? HUB_CHANGE_OVERCURRENT : 0;
hs->wHubStatus = (__force __u16)cpu_to_hc16(ahcd, status);
hs->wHubChange = (__force __u16)cpu_to_hc16(ahcd, change);
return 0;
}
static int admhc_get_port_status(struct admhcd *ahcd, unsigned port, char *buf)
{
struct usb_port_status *ps = (struct usb_port_status *)buf;
u32 t = admhc_read_portstatus(ahcd, port);
u16 status, change;
status = 0;
status |= (t & ADMHC_PS_CCS) ? USB_PORT_STAT_CONNECTION : 0;
status |= (t & ADMHC_PS_PES) ? USB_PORT_STAT_ENABLE : 0;
status |= (t & ADMHC_PS_PSS) ? USB_PORT_STAT_SUSPEND : 0;
status |= (t & ADMHC_PS_POCI) ? USB_PORT_STAT_OVERCURRENT : 0;
status |= (t & ADMHC_PS_PRS) ? USB_PORT_STAT_RESET : 0;
status |= (t & ADMHC_PS_PPS) ? USB_PORT_STAT_POWER : 0;
status |= (t & ADMHC_PS_LSDA) ? USB_PORT_STAT_LOW_SPEED : 0;
change = 0;
change |= (t & ADMHC_PS_CSC) ? USB_PORT_STAT_C_CONNECTION : 0;
change |= (t & ADMHC_PS_PESC) ? USB_PORT_STAT_C_ENABLE : 0;
change |= (t & ADMHC_PS_PSSC) ? USB_PORT_STAT_C_SUSPEND : 0;
change |= (t & ADMHC_PS_OCIC) ? USB_PORT_STAT_C_OVERCURRENT : 0;
change |= (t & ADMHC_PS_PRSC) ? USB_PORT_STAT_C_RESET : 0;
ps->wPortStatus = (__force __u16)cpu_to_hc16(ahcd, status);
ps->wPortChange = (__force __u16)cpu_to_hc16(ahcd, change);
return 0;
} }
/*-------------------------------------------------------------------------*/ /*-------------------------------------------------------------------------*/
@ -170,12 +220,12 @@ static int admhc_start_port_reset(struct usb_hcd *hcd, unsigned port)
port--; port--;
/* start port reset before HNP protocol times out */ /* start port reset before HNP protocol times out */
status = admhc_readl(ahcd, &ahcd->regs->portstatus[port]); status = admhc_read_portstatus(ahcd, port);
if (!(status & ADMHC_PS_CCS)) if (!(status & ADMHC_PS_CCS))
return -ENODEV; return -ENODEV;
/* khubd will finish the reset later */ /* khubd will finish the reset later */
admhc_writel(ahcd, ADMHC_PS_PRS, &ahcd->regs->portstatus[port]); admhc_write_portstatus(ahcd, port, ADMHC_PS_PRS);
return 0; return 0;
} }
@ -208,91 +258,107 @@ static void start_hnp(struct admhcd *ahcd);
#define tick_before(t1,t2) ((s16)(((s16)(t1))-((s16)(t2))) < 0) #define tick_before(t1,t2) ((s16)(((s16)(t1))-((s16)(t2))) < 0)
/* called from some task, normally khubd */ /* called from some task, normally khubd */
static inline int root_port_reset(struct admhcd *ahcd, unsigned port) static inline int admhc_port_reset(struct admhcd *ahcd, unsigned port)
{ {
#if 0 u32 t;
/* FIXME: revert to this when frame numbers are updated */ int c;
__hc32 __iomem *portstat = &ahcd->regs->portstatus[port];
u32 temp;
u16 now = admhc_readl(ahcd, &ahcd->regs->fmnumber);
u16 reset_done = now + PORT_RESET_MSEC;
/* build a "continuous enough" reset signal, with up to admhc_vdbg(ahcd, "reset port%d\n", port);
* 3msec gap between pulses. scheduler HZ==100 must work;
* this might need to be deadline-scheduled. t = admhc_read_portstatus(ahcd, port);
*/ if (!(t & ADMHC_PS_CCS))
return -ENODEV;
if ((t & ADMHC_PS_PRS))
return 0;
admhc_write_portstatus(ahcd, port, ADMHC_PS_PRS);
c = 0;
do { do {
/* spin until any current reset finishes */ t = admhc_read_portstatus(ahcd, port);
for (;;) { if (t & ADMHC_PS_PRSC)
temp = admhc_readl(ahcd, portstat);
/* handle e.g. CardBus eject */
if (temp == ~(u32)0)
return -ESHUTDOWN;
if (!(temp & ADMHC_PS_PRS))
break;
udelay (500);
}
if (!(temp & ADMHC_PS_CCS))
break;
if (temp & ADMHC_PS_PRSC)
admhc_writel(ahcd, ADMHC_PS_PRSC, portstat);
/* start the next reset, sleep till it's probably done */
admhc_writel(ahcd, ADMHC_PS_PRS, portstat);
msleep(PORT_RESET_HW_MSEC);
now = admhc_readl(ahcd, &ahcd->regs->fmnumber);
} while (tick_before(now, reset_done));
/* caller synchronizes using PRSC */
#else
__hc32 __iomem *portstat = &ahcd->regs->portstatus[port];
u32 temp;
unsigned long reset_done = jiffies + msecs_to_jiffies(PORT_RESET_MSEC);
/* build a "continuous enough" reset signal, with up to
* 3msec gap between pulses. scheduler HZ==100 must work;
* this might need to be deadline-scheduled.
*/
do {
/* spin until any current reset finishes */
for (;;) {
temp = admhc_readl(ahcd, portstat);
/* handle e.g. CardBus eject */
if (temp == ~(u32)0)
return -ESHUTDOWN;
if (!(temp & ADMHC_PS_PRS))
break;
udelay (500);
}
if (!(temp & ADMHC_PS_CCS))
break; break;
if (temp & ADMHC_PS_PRSC) if (++c > 20) {
admhc_writel(ahcd, ADMHC_PS_PRSC, portstat); admhc_err(ahcd, "port%d reset timed out\n",port);
return -EPIPE;
}
/* start the next reset, sleep till it's probably done */ mdelay(PORT_RESET_HW_MSEC);
admhc_writel(ahcd, ADMHC_PS_PRS, portstat); } while (1);
msleep(PORT_RESET_HW_MSEC); admhc_vdbg(ahcd, "port%d reset completed within %dms\n", port,
} while (time_before(jiffies, reset_done)); c * PORT_RESET_HW_MSEC);
t = admhc_read_portstatus(ahcd, port);
if (!(t & ADMHC_PS_CCS)) {
admhc_err(ahcd, "port%d is not connected after reset\n",port);
return -ENODEV;
}
admhc_write_portstatus(ahcd, port, ADMHC_PS_SPE);
c = 0;
do {
t = admhc_read_portstatus(ahcd, port);
if (t & ADMHC_PS_PESC)
break;
if (++c > 20) {
admhc_err(ahcd, "port%d enable timed out\n",port);
return -EPIPE;
}
mdelay(PORT_RESET_HW_MSEC);
} while (1);
admhc_vdbg(ahcd, "port%d enable completed within %dms\n", port,
c * PORT_RESET_HW_MSEC);
admhc_write_portstatus(ahcd, port, ADMHC_PS_CSC);
admhc_writel(ahcd, ADMHC_PS_SPE | ADMHC_PS_CSC, portstat);
msleep(100);
#endif
return 0; return 0;
} }
static int admhc_hub_control ( static inline int admhc_port_enable(struct admhcd *ahcd, unsigned port)
struct usb_hcd *hcd, {
u16 typeReq, u32 t;
u16 wValue,
u16 wIndex, admhc_vdbg(ahcd, "enable port%d\n", port);
char *buf, t = admhc_read_portstatus(ahcd, port);
u16 wLength if (!(t & ADMHC_PS_CCS))
) { return -ENODEV;
admhc_write_portstatus(ahcd, port, ADMHC_PS_SPE);
return 0;
}
static inline int admhc_port_disable(struct admhcd *ahcd, unsigned port)
{
u32 t;
admhc_vdbg(ahcd, "disable port%d\n", port);
t = admhc_read_portstatus(ahcd, port);
if (!(t & ADMHC_PS_CCS))
return -ENODEV;
admhc_write_portstatus(ahcd, ADMHC_PS_CPE, port);
return 0;
}
static inline int admhc_port_write(struct admhcd *ahcd, unsigned port,
u32 val)
{
dbg_port_write(ahcd, "write", port, val);
admhc_write_portstatus(ahcd, port, val);
return 0;
}
static int admhc_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
u16 wIndex, char *buf, u16 wLength)
{
struct admhcd *ahcd = hcd_to_admhcd(hcd); struct admhcd *ahcd = hcd_to_admhcd(hcd);
int ports = hcd_to_bus (hcd)->root_hub->maxchild; int ports = hcd_to_bus(hcd)->root_hub->maxchild;
u32 temp;
int ret = 0; int ret = 0;
if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))) if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)))
@ -319,55 +385,50 @@ static int admhc_hub_control (
switch (wValue) { switch (wValue) {
case USB_PORT_FEAT_ENABLE: case USB_PORT_FEAT_ENABLE:
temp = ADMHC_PS_CPE; ret = admhc_port_disable(ahcd, wIndex);
break; break;
case USB_PORT_FEAT_SUSPEND: case USB_PORT_FEAT_SUSPEND:
temp = ADMHC_PS_CPS; ret = admhc_port_write(ahcd, wIndex, ADMHC_PS_CPS);
break; break;
case USB_PORT_FEAT_POWER: case USB_PORT_FEAT_POWER:
temp = ADMHC_PS_CPP; ret = admhc_port_write(ahcd, wIndex, ADMHC_PS_CPP);
break; break;
case USB_PORT_FEAT_C_CONNECTION: case USB_PORT_FEAT_C_CONNECTION:
temp = ADMHC_PS_CSC; ret = admhc_port_write(ahcd, wIndex, ADMHC_PS_CSC);
break; break;
case USB_PORT_FEAT_C_ENABLE: case USB_PORT_FEAT_C_ENABLE:
temp = ADMHC_PS_PESC; ret = admhc_port_write(ahcd, wIndex, ADMHC_PS_PESC);
break; break;
case USB_PORT_FEAT_C_SUSPEND: case USB_PORT_FEAT_C_SUSPEND:
temp = ADMHC_PS_PSSC; ret = admhc_port_write(ahcd, wIndex, ADMHC_PS_PSSC);
break; break;
case USB_PORT_FEAT_C_OVER_CURRENT: case USB_PORT_FEAT_C_OVER_CURRENT:
temp = ADMHC_PS_OCIC; ret = admhc_port_write(ahcd, wIndex, ADMHC_PS_OCIC);
break; break;
case USB_PORT_FEAT_C_RESET: case USB_PORT_FEAT_C_RESET:
temp = ADMHC_PS_PRSC; ret = admhc_port_write(ahcd, wIndex, ADMHC_PS_PRSC);
break; break;
default: default:
goto error; goto error;
} }
admhc_writel(ahcd, temp, &ahcd->regs->portstatus[wIndex]);
break; break;
case GetHubDescriptor: case GetHubDescriptor:
admhc_hub_descriptor(ahcd, (struct usb_hub_descriptor *) buf); ret = admhc_get_hub_descriptor(ahcd, buf);
break; break;
case GetHubStatus: case GetHubStatus:
temp = admhc_get_rhdesc(ahcd); ret = admhc_get_hub_status(ahcd, buf);
temp &= ~(ADMHC_RH_CRWE | ADMHC_RH_DRWE);
put_unaligned(cpu_to_le32 (temp), (__le32 *) buf);
break; break;
case GetPortStatus: case GetPortStatus:
if (!wIndex || wIndex > ports) if (!wIndex || wIndex > ports)
goto error; goto error;
wIndex--; wIndex--;
temp = admhc_get_portstatus(ahcd, wIndex);
put_unaligned(cpu_to_le32 (temp), (__le32 *) buf);
dbg_port(ahcd, "GetPortStatus", wIndex, temp); ret = admhc_get_port_status(ahcd, wIndex, buf);
break; break;
case SetHubFeature: case SetHubFeature:
switch (wValue) { switch (wValue) {
case C_HUB_OVER_CURRENT: case C_HUB_OVER_CURRENT:
// FIXME: this can be cleared, yes? /* FIXME: this can be cleared, yes? */
case C_HUB_LOCAL_POWER: case C_HUB_LOCAL_POWER:
break; break;
default: default:
@ -381,8 +442,10 @@ static int admhc_hub_control (
switch (wValue) { switch (wValue) {
case USB_PORT_FEAT_ENABLE: case USB_PORT_FEAT_ENABLE:
admhc_writel(ahcd, ADMHC_PS_SPE, ret = admhc_port_enable(ahcd, wIndex);
&ahcd->regs->portstatus[wIndex]); break;
case USB_PORT_FEAT_RESET:
ret = admhc_port_reset(ahcd, wIndex);
break; break;
case USB_PORT_FEAT_SUSPEND: case USB_PORT_FEAT_SUSPEND:
#ifdef CONFIG_USB_OTG #ifdef CONFIG_USB_OTG
@ -391,15 +454,10 @@ static int admhc_hub_control (
start_hnp(ahcd); start_hnp(ahcd);
else else
#endif #endif
admhc_writel(ahcd, ADMHC_PS_SPS, ret = admhc_port_write(ahcd, wIndex, ADMHC_PS_SPS);
&ahcd->regs->portstatus[wIndex]);
break; break;
case USB_PORT_FEAT_POWER: case USB_PORT_FEAT_POWER:
admhc_writel(ahcd, ADMHC_PS_SPP, ret = admhc_port_write(ahcd, wIndex, ADMHC_PS_SPP);
&ahcd->regs->portstatus[wIndex]);
break;
case USB_PORT_FEAT_RESET:
ret = root_port_reset(ahcd, wIndex);
break; break;
default: default:
goto error; goto error;
@ -411,6 +469,7 @@ error:
/* "protocol stall" on error */ /* "protocol stall" on error */
ret = -EPIPE; ret = -EPIPE;
} }
return ret; return ret;
} }

2
target/linux/adm5120/files/drivers/usb/host/adm5120-mem.c
View File

@ -147,7 +147,7 @@ static struct urb_priv *urb_priv_alloc(struct admhcd *ahcd, int num_tds,
if (!priv) if (!priv)
goto err; goto err;
/* allocate the TDs (deferring hash chain updates) */ /* allocate the TDs */
for (i = 0; i < num_tds; i++) { for (i = 0; i < num_tds; i++) {
priv->td[i] = td_alloc(ahcd, mem_flags); priv->td[i] = td_alloc(ahcd, mem_flags);
if (priv->td[i] == NULL) if (priv->td[i] == NULL)

19
target/linux/adm5120/files/drivers/usb/host/adm5120.h
View File

@ -436,8 +436,13 @@ static inline struct usb_hcd *admhcd_to_hcd(const struct admhcd *ahcd)
#define STUB_DEBUG_FILES #define STUB_DEBUG_FILES
#endif /* DEBUG */ #endif /* DEBUG */
#define admhc_dbg(ahcd, fmt, args...) \ #ifdef DEBUG
printk(KERN_DEBUG "adm5120-hcd: " fmt , ## args ) # define admhc_dbg(ahcd, fmt, args...) \
printk(KERN_DEBUG "adm5120-hcd: " fmt , ## args )
#else
# define admhc_dbg(ahcd, fmt, args...) do { } while (0)
#endif
#define admhc_err(ahcd, fmt, args...) \ #define admhc_err(ahcd, fmt, args...) \
printk(KERN_ERR "adm5120-hcd: " fmt , ## args ) printk(KERN_ERR "adm5120-hcd: " fmt , ## args )
#define ahcd_info(ahcd, fmt, args...) \ #define ahcd_info(ahcd, fmt, args...) \
@ -645,16 +650,22 @@ static inline void periodic_reinit(struct admhcd *ahcd)
&ahcd->regs->fminterval); &ahcd->regs->fminterval);
} }
static inline u32 admhc_get_rhdesc(struct admhcd *ahcd) static inline u32 admhc_read_rhdesc(struct admhcd *ahcd)
{ {
return admhc_readl(ahcd, &ahcd->regs->rhdesc); return admhc_readl(ahcd, &ahcd->regs->rhdesc);
} }
static inline u32 admhc_get_portstatus(struct admhcd *ahcd, int port) static inline u32 admhc_read_portstatus(struct admhcd *ahcd, int port)
{ {
return admhc_readl(ahcd, &ahcd->regs->portstatus[port]); return admhc_readl(ahcd, &ahcd->regs->portstatus[port]);
} }
static inline void admhc_write_portstatus(struct admhcd *ahcd, int port,
u32 value)
{
admhc_writel(ahcd, value, &ahcd->regs->portstatus[port]);
}
static inline void roothub_write_status(struct admhcd *ahcd, u32 value) static inline void roothub_write_status(struct admhcd *ahcd, u32 value)
{ {
/* FIXME: read-only bits must be masked out */ /* FIXME: read-only bits must be masked out */