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fix the CF driver on 2.6.26.x, and create a package for it

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SVN-Revision: 12364
This commit is contained in:
Gabor Juhos 2008-08-21 16:52:06 +00:00
parent 4419978f84
commit 8d28e6dc68
4 changed files with 244 additions and 104 deletions
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18
package/kernel/modules/block.mk
View File

@ -1,5 +1,5 @@
#
# Copyright (C) 2006 OpenWrt.org
# Copyright (C) 2006-2008 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
@ -175,6 +175,22 @@ endef
$(eval $(call KernelPackage,ide-aec62xx))
define KernelPackage/ide-magicbox
SUBMENU:=$(BLOCK_MENU)
TITLE:=Magicbox 2.0 IDE CF driver
DEPENDS:=@TARGET_magicbox +kmod-ide-core
KCONFIG:=CONFIG_BLK_DEV_MAGICBOX_IDE
FILES:=$(LINUX_DIR)/drivers/ide/ppc/magicbox_ide.$(LINUX_KMOD_SUFFIX)
AUTOLOAD:=$(call AutoLoad,30,magicbox_ide)
endef
define KernelPackage/ide-magicbox/description
Support for Magicbox 2.0 onboard CF slot.
endef
$(eval $(call KernelPackage,ide-magicbox))
define KernelPackage/ide-pdc202xx
SUBMENU:=$(BLOCK_MENU)
TITLE:=Promise PDC202xx IDE driver

2
target/linux/magicbox/config-default
View File

@ -18,7 +18,7 @@ CONFIG_BITREVERSE=y
CONFIG_BLK_DEV_IDE=m
CONFIG_BLK_DEV_IDEDISK=m
# CONFIG_BLK_DEV_IDEDMA is not set
# CONFIG_BLK_DEV_MAGICBOX_IDE is not set
CONFIG_BLK_DEV_MAGICBOX_IDE=m
# CONFIG_BOOKE_WDT is not set
CONFIG_BOOT_LOAD=0x00400000
CONFIG_BOUNCE=y

303
target/linux/magicbox/files/drivers/ide/ppc/magicbox_ide.c
View File

@ -1,5 +1,8 @@
/* Driver for MagicBox 2.0 onboard CompactFlash adapter.
/*
* Driver for MagicBox 2.0 onboard CompactFlash adapter.
*
* Written by Wojtek Kaniewski <wojtekka@toxygen.net>
* Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
*
* GNU General Public License.
*/
@ -14,24 +17,27 @@
#include <linux/delay.h>
#include <linux/platform_device.h>
#define UIC0_PR 0xc4
#define UIC0_TR 0xc5
#define MAGICBOX_CF_IRQ 25
#define UIC0_PR 0xc4
#define UIC0_TR 0xc5
#define IRQ 25
static int ide_offsets[IDE_NR_PORTS] = {0, 2, 4, 6, 8, 10, 12, 14, -1, -1};
static u8 magicbox_ide_inb (unsigned long port)
static u8 magicbox_ide_inb(unsigned long port)
{
return (u8) (readw((void __iomem *) port) >> 8) & 255;
return (u8) (readw((void __iomem *) port) >> 8) & 0xff;
}
static u16 magicbox_ide_inw (unsigned long port)
static void magicbox_ide_outb(u8 value, unsigned long port)
{
return (u16) readw((void __iomem *) port);
writew(value << 8, (void __iomem *) port);
}
static void magicbox_ide_insw (unsigned long port, void *addr, u32 count)
static void magicbox_ide_outbsync(ide_drive_t *drive, u8 value,
unsigned long port)
{
writew(value << 8, (void __iomem *) port);
}
static inline void magicbox_ide_insw(unsigned long port, void *addr, u32 count)
{
u16 *ptr;
@ -39,12 +45,7 @@ static void magicbox_ide_insw (unsigned long port, void *addr, u32 count)
*ptr = readw((void __iomem *) port);
}
static u32 magicbox_ide_inl (unsigned long port)
{
return (u32) readl((void __iomem *) port);
}
static void magicbox_ide_insl (unsigned long port, void *addr, u32 count)
static inline void magicbox_ide_insl(unsigned long port, void *addr, u32 count)
{
u32 *ptr;
@ -52,22 +53,8 @@ static void magicbox_ide_insl (unsigned long port, void *addr, u32 count)
*ptr = readl((void __iomem *) port);
}
static void magicbox_ide_outb (u8 value, unsigned long port)
{
writew(value << 8, (void __iomem *) port);
}
static void magicbox_ide_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
{
writew(value << 8, (void __iomem *) port);
}
static void magicbox_ide_outw (u16 value, unsigned long port)
{
writew(value, (void __iomem *) port);
}
static void magicbox_ide_outsw (unsigned long port, void *addr, u32 count)
static inline void magicbox_ide_outsw(unsigned long port, void *addr,
u32 count)
{
u16 *ptr;
@ -75,12 +62,8 @@ static void magicbox_ide_outsw (unsigned long port, void *addr, u32 count)
writew(*ptr, (void __iomem *) port);
}
static void magicbox_ide_outl (u32 value, unsigned long port)
{
writel(value, (void __iomem *) port);
}
static void magicbox_ide_outsl (unsigned long port, void *addr, u32 count)
static inline void magicbox_ide_outsl(unsigned long port, void *addr,
u32 count)
{
u32 *ptr;
@ -88,46 +71,211 @@ static void magicbox_ide_outsl (unsigned long port, void *addr, u32 count)
writel(*ptr, (void __iomem *) port);
}
static void __init ide_magicbox_register(unsigned long addr,
unsigned long caddr, int irq)
static void magicbox_ide_tf_load(ide_drive_t *drive, ide_task_t *task)
{
hw_regs_t hw;
ide_hwif_t *hwif;
struct ide_io_ports *io_ports = &drive->hwif->io_ports;
struct ide_taskfile *tf = &task->tf;
u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
memset(&hw, 0, sizeof(hw));
ide_setup_ports(&hw, addr, ide_offsets, caddr + 12, 0, NULL,irq);
if (task->tf_flags & IDE_TFLAG_FLAGGED)
HIHI = 0xFF;
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
if (ide_register_hw(&hw, &hwif) != -1)
#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
if (ide_register_hw(&hw, 1, &hwif) != -1)
#else
if (ide_register_hw(&hw, NULL, 1, &hwif) != -1)
#endif
{
printk(KERN_NOTICE "magicbox-ide: Registered IDE-CF driver\n");
hwif->mmio = 2;
hwif->drives[0].unmask = 1;
hwif->OUTB = magicbox_ide_outb;
hwif->OUTBSYNC = magicbox_ide_outbsync;
hwif->OUTW = magicbox_ide_outw;
hwif->OUTSW = magicbox_ide_outsw;
hwif->OUTSL = magicbox_ide_outsl;
hwif->INB = magicbox_ide_inb;
hwif->INW = magicbox_ide_inw;
hwif->INSW = magicbox_ide_insw;
hwif->INSL = magicbox_ide_insl;
ide_set_irq(drive, 1);
if (task->tf_flags & IDE_TFLAG_OUT_DATA)
writel((tf->hob_data << 8) | tf->data,
(void __iomem *) io_ports->data_addr);
if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
magicbox_ide_outb(tf->hob_feature, io_ports->feature_addr);
if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
magicbox_ide_outb(tf->hob_nsect, io_ports->nsect_addr);
if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
magicbox_ide_outb(tf->hob_lbal, io_ports->lbal_addr);
if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
magicbox_ide_outb(tf->hob_lbam, io_ports->lbam_addr);
if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
magicbox_ide_outb(tf->hob_lbah, io_ports->lbah_addr);
if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
magicbox_ide_outb(tf->feature, io_ports->feature_addr);
if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
magicbox_ide_outb(tf->nsect, io_ports->nsect_addr);
if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
magicbox_ide_outb(tf->lbal, io_ports->lbal_addr);
if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
magicbox_ide_outb(tf->lbam, io_ports->lbam_addr);
if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
magicbox_ide_outb(tf->lbah, io_ports->lbah_addr);
if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
magicbox_ide_outb((tf->device & HIHI) | drive->select.all,
io_ports->device_addr);
}
static void magicbox_ide_tf_read(ide_drive_t *drive, ide_task_t *task)
{
struct ide_io_ports *io_ports = &drive->hwif->io_ports;
struct ide_taskfile *tf = &task->tf;
if (task->tf_flags & IDE_TFLAG_IN_DATA) {
u16 data = (u16) readl((void __iomem *) io_ports->data_addr);
tf->data = data & 0xff;
tf->hob_data = (data >> 8) & 0xff;
}
/* be sure we're looking at the low order bits */
magicbox_ide_outb(drive->ctl & ~0x80, io_ports->ctl_addr);
if (task->tf_flags & IDE_TFLAG_IN_NSECT)
tf->nsect = magicbox_ide_inb(io_ports->nsect_addr);
if (task->tf_flags & IDE_TFLAG_IN_LBAL)
tf->lbal = magicbox_ide_inb(io_ports->lbal_addr);
if (task->tf_flags & IDE_TFLAG_IN_LBAM)
tf->lbam = magicbox_ide_inb(io_ports->lbam_addr);
if (task->tf_flags & IDE_TFLAG_IN_LBAH)
tf->lbah = magicbox_ide_inb(io_ports->lbah_addr);
if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
tf->device = magicbox_ide_inb(io_ports->device_addr);
if (task->tf_flags & IDE_TFLAG_LBA48) {
magicbox_ide_outb(drive->ctl | 0x80, io_ports->ctl_addr);
if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
tf->hob_feature = magicbox_ide_inb(io_ports->feature_addr);
if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
tf->hob_nsect = magicbox_ide_inb(io_ports->nsect_addr);
if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
tf->hob_lbal = magicbox_ide_inb(io_ports->lbal_addr);
if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
tf->hob_lbam = magicbox_ide_inb(io_ports->lbam_addr);
if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
tf->hob_lbah = magicbox_ide_inb(io_ports->lbah_addr);
}
}
void __init ide_magicbox_init(void)
static void magicbox_ide_input_data(ide_drive_t *drive, struct request *rq,
void *buf, unsigned int len)
{
volatile u16 *addr;
volatile u16 *caddr;
unsigned long port = drive->hwif->io_ports.data_addr;
len++;
if (drive->io_32bit) {
magicbox_ide_insl(port, buf, len / 4);
if ((len & 3) >= 2)
magicbox_ide_insw(port, (u8 *)buf + (len & ~3), 1);
} else
magicbox_ide_insw(port, buf, len / 2);
}
static void magicbox_ide_output_data(ide_drive_t *drive, struct request *rq,
void *buf, unsigned int len)
{
unsigned long port = drive->hwif->io_ports.data_addr;
len++;
if (drive->io_32bit) {
magicbox_ide_outsl(port, buf, len / 4);
if ((len & 3) >= 2)
magicbox_ide_outsw(port, (u8 *)buf + (len & ~3), 1);
} else
magicbox_ide_outsw(port, buf, len / 2);
}
static void __init magicbox_ide_setup_hw(hw_regs_t *hw, u16 __iomem *base,
u16 __iomem *ctrl, int irq)
{
unsigned long port = (unsigned long) base;
int i;
memset(hw, 0, sizeof(*hw));
for (i = 0; i <= 7; i++)
hw->io_ports_array[i] = port + i * 2;
/*
* the IDE control register is at ATA address 6,
* with CS1 active instead of CS0
*/
hw->io_ports.ctl_addr = (unsigned long)ctrl + (6 * 2);
hw->irq = irq;
hw->chipset = ide_generic;
hw->ack_intr = NULL;
}
static int __init magibox_ide_probe(void)
{
hw_regs_t hw;
ide_hwif_t *hwif;
u16 __iomem *base;
u16 __iomem *ctrl;
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
int err;
/* Remap physical address space */
base = ioremap_nocache(0xff100000, 4096);
if (base == NULL) {
err = -EBUSY;
goto err_out;
}
ctrl = ioremap_nocache(0xff200000, 4096);
if (ctrl == NULL) {
err = -EBUSY;
goto err_unmap_base;
}
magicbox_ide_setup_hw(&hw, base, ctrl, MAGICBOX_CF_IRQ);
hwif = ide_find_port();
if (!hwif) {
err = -ENODEV;
goto err_unmap_ctrl;
}
ide_init_port_data(hwif, hwif->index);
ide_init_port_hw(hwif, &hw);
hwif->host_flags = IDE_HFLAG_MMIO;
hwif->tf_load = magicbox_ide_tf_load;
hwif->tf_read = magicbox_ide_tf_read;
hwif->input_data = magicbox_ide_input_data;
hwif->output_data = magicbox_ide_output_data;
hwif->drives[0].unmask = 1;
hwif->OUTB = magicbox_ide_outb;
hwif->OUTBSYNC = magicbox_ide_outbsync;
hwif->INB = magicbox_ide_inb;
printk(KERN_INFO "ide%d: Magicbox CF interface\n", hwif->index);
idx[0] = hwif->index;
ide_device_add(idx, NULL);
return 0;
err_unmap_ctrl:
iounmap(ctrl);
err_unmap_base:
iounmap(base);
err_out:
return err;
}
static int __init magicbox_ide_init(void)
{
/* Turn on PerWE instead of PCIsomething */
mtdcr(DCRN_CPC0_PCI_BASE, mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
mtdcr(DCRN_CPC0_PCI_BASE,
mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
/* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
mtdcr(DCRN_EBC_BASE, 1);
@ -141,14 +289,13 @@ void __init ide_magicbox_init(void)
mtdcr(DCRN_EBC_BASE, 0x12);
mtdcr(DCRN_EBC_BASE + 1, 0x080bd800);
/* Remap physical address space */
addr = ioremap_nocache(0xff100000, 4096);
caddr = ioremap_nocache(0xff200000, 4096);
/* Set interrupt to low-to-high-edge-triggered */
mtdcr(UIC0_TR, mfdcr(UIC0_TR) & ~(0x80000000L >> IRQ));
mtdcr(UIC0_PR, mfdcr(UIC0_PR) | (0x80000000L >> IRQ));
mtdcr(UIC0_TR, mfdcr(UIC0_TR) & ~(0x80000000L >> MAGICBOX_CF_IRQ));
mtdcr(UIC0_PR, mfdcr(UIC0_PR) | (0x80000000L >> MAGICBOX_CF_IRQ));
ide_magicbox_register((unsigned long)addr, (unsigned long)caddr, IRQ);
return magibox_ide_probe();
}
module_init(magicbox_ide_init);
MODULE_LICENSE("GPL");

25
target/linux/magicbox/patches/100-cf_slot.patch
View File

@ -1,26 +1,3 @@
--- a/drivers/ide/ide.c
+++ b/drivers/ide/ide.c
@@ -78,6 +78,10 @@
/* default maximum number of failures */
#define IDE_DEFAULT_MAX_FAILURES 1
+#ifdef CONFIG_BLK_DEV_MAGICBOX_IDE
+extern void __init ide_magicbox_init(void);
+#endif
+
struct class *ide_port_class;
static const u8 ide_hwif_to_major[] = { IDE0_MAJOR, IDE1_MAJOR,
@@ -494,6 +498,9 @@
return -EPERM;
#endif
+#ifdef CONFIG_BLK_DEV_MAGICBOX_IDE
+ ide_magicbox_init();
+#endif
}
int set_pio_mode(ide_drive_t *drive, int arg)
--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
@@ -928,6 +928,14 @@
@ -28,7 +5,7 @@
If unsure, say N.
+config BLK_DEV_MAGICBOX_IDE
+ bool "MagicBox 2.0 CF IDE support"
+ tristate "MagicBox 2.0 CF IDE support"
+ depends on 4xx && IDE
+ help
+ This option provides support for IDE on MagicBox 2.0 boards.