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atheros: v3.18: update names and declarations

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Sync functions, variables and enums names with upstream. Mostly replace
'ar231x_' prefix by 'ath25_'.

No functional changes, except few 'int' -> 'unsigned' changes.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>

SVN-Revision: 44712
This commit is contained in:
Felix Fietkau 2015-03-13 02:58:58 +00:00
parent fb4c293629
commit 8a98d187d5
6 changed files with 215 additions and 237 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

424
target/linux/atheros/patches-3.18/100-board.patch
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@ -110,7 +110,7 @@
+#include "ar5312.h"
+#include "ar2315.h"
+
+void (*ar231x_irq_dispatch)(void);
+void (*ath25_irq_dispatch)(void);
+
+static inline bool check_radio_magic(u8 *addr)
+{
@ -126,19 +126,19 @@
+static inline bool check_board_data(u8 *flash_limit, u8 *addr, bool broken)
+{
+ /* config magic found */
+ if (*((u32 *)addr) == AR231X_BD_MAGIC)
+ if (*((u32 *)addr) == ATH25_BD_MAGIC)
+ return true;
+
+ if (!broken)
+ return false;
+
+ if (check_radio_magic(addr + 0xf8))
+ ar231x_board.radio = addr + 0xf8;
+ ath25_board.radio = addr + 0xf8;
+ if ((addr < flash_limit + 0x10000) &&
+ check_radio_magic(addr + 0x10000))
+ ar231x_board.radio = addr + 0x10000;
+ ath25_board.radio = addr + 0x10000;
+
+ if (ar231x_board.radio) {
+ if (ath25_board.radio) {
+ /* broken board data detected, use radio data to find the
+ * offset, user will fix this */
+ return true;
@ -187,9 +187,9 @@
+ return NULL;
+}
+
+int __init ar231x_find_config(u8 *flash_limit)
+int __init ath25_find_config(u8 *flash_limit)
+{
+ struct ar231x_boarddata *config;
+ struct ath25_boarddata *config;
+ unsigned int rcfg_size;
+ int broken_boarddata = 0;
+ u8 *bcfg, *rcfg;
@ -198,8 +198,8 @@
+ u8 *mac_addr;
+ u32 offset;
+
+ ar231x_board.config = NULL;
+ ar231x_board.radio = NULL;
+ ath25_board.config = NULL;
+ ath25_board.radio = NULL;
+ /* Copy the board and radio data to RAM, because accessing the mapped
+ * memory of the flash directly after booting is not safe */
+
@ -218,11 +218,11 @@
+ }
+
+ board_data = kzalloc(BOARD_CONFIG_BUFSZ, GFP_KERNEL);
+ ar231x_board.config = (struct ar231x_boarddata *)board_data;
+ ath25_board.config = (struct ath25_boarddata *)board_data;
+ memcpy(board_data, bcfg, 0x100);
+ if (broken_boarddata) {
+ pr_warn("WARNING: broken board data detected\n");
+ config = ar231x_board.config;
+ config = ath25_board.config;
+ if (is_zero_ether_addr(config->enet0_mac)) {
+ pr_info("Fixing up empty mac addresses\n");
+ config->reset_config_gpio = 0xffff;
@ -237,8 +237,8 @@
+ /* Radio config starts 0x100 bytes after board config, regardless
+ * of what the physical layout on the flash chip looks like */
+
+ if (ar231x_board.radio)
+ rcfg = (u8 *)ar231x_board.radio;
+ if (ath25_board.radio)
+ rcfg = (u8 *)ath25_board.radio;
+ else
+ rcfg = find_radio_config(flash_limit, bcfg);
+
@ -246,7 +246,7 @@
+ return -ENODEV;
+
+ radio_data = board_data + 0x100 + ((rcfg - bcfg) & 0xfff);
+ ar231x_board.radio = radio_data;
+ ath25_board.radio = radio_data;
+ offset = radio_data - board_data;
+ pr_info("Radio config found at offset 0x%x (0x%x)\n", rcfg - bcfg,
+ offset);
@ -256,13 +256,13 @@
+ mac_addr = &radio_data[0x1d * 2];
+ if (is_broadcast_ether_addr(mac_addr)) {
+ pr_info("Radio MAC is blank; using board-data\n");
+ ether_addr_copy(mac_addr, ar231x_board.config->wlan0_mac);
+ ether_addr_copy(mac_addr, ath25_board.config->wlan0_mac);
+ }
+
+ return 0;
+}
+
+static void ar231x_halt(void)
+static void ath25_halt(void)
+{
+ local_irq_disable();
+ while (1)
@ -271,11 +271,11 @@
+
+void __init plat_mem_setup(void)
+{
+ _machine_halt = ar231x_halt;
+ pm_power_off = ar231x_halt;
+ _machine_halt = ath25_halt;
+ pm_power_off = ath25_halt;
+
+ ar5312_plat_setup();
+ ar2315_plat_setup();
+ ar5312_plat_mem_setup();
+ ar2315_plat_mem_setup();
+
+ /* Disable data watchpoints */
+ write_c0_watchlo0(0);
@ -283,13 +283,13 @@
+
+asmlinkage void plat_irq_dispatch(void)
+{
+ ar231x_irq_dispatch();
+ ath25_irq_dispatch();
+}
+
+void __init plat_time_init(void)
+{
+ ar5312_time_init();
+ ar2315_time_init();
+ ar5312_plat_time_init();
+ ar2315_plat_time_init();
+}
+
+unsigned int __cpuinit get_c0_compare_int(void)
@ -303,8 +303,8 @@
+ mips_cpu_irq_init();
+
+ /* Initialize interrupt controllers */
+ ar5312_irq_init();
+ ar2315_irq_init();
+ ar5312_arch_init_irq();
+ ar2315_arch_init_irq();
+}
+
--- /dev/null
@ -361,9 +361,9 @@
+ * The main reason we need it is in order to extract the ethernet MAC
+ * address(es).
+ */
+struct ar231x_boarddata {
+struct ath25_boarddata {
+ u32 magic; /* board data is valid */
+#define AR231X_BD_MAGIC 0x35333131 /* "5311", for all 531x/231x platforms */
+#define ATH25_BD_MAGIC 0x35333131 /* "5311", for all 531x/231x platforms */
+ u16 cksum; /* checksum (starting with BD_REV 2) */
+ u16 rev; /* revision of this struct */
+#define BD_REV 4
@ -416,7 +416,7 @@
+ u16 devid;
+
+ /* board config data */
+ struct ar231x_boarddata *config;
+ struct ath25_boarddata *config;
+
+ /* radio calibration data */
+ const char *radio;
@ -519,7 +519,7 @@
+#include <linux/device.h>
+#include <ar2315_regs.h>
+
+static inline dma_addr_t ar231x_dev_offset(struct device *dev)
+static inline dma_addr_t ath25_dev_offset(struct device *dev)
+{
+#ifdef CONFIG_PCI
+ extern struct bus_type pci_bus_type;
@ -533,19 +533,19 @@
+static inline dma_addr_t
+plat_map_dma_mem(struct device *dev, void *addr, size_t size)
+{
+ return virt_to_phys(addr) + ar231x_dev_offset(dev);
+ return virt_to_phys(addr) + ath25_dev_offset(dev);
+}
+
+static inline dma_addr_t
+plat_map_dma_mem_page(struct device *dev, struct page *page)
+{
+ return page_to_phys(page) + ar231x_dev_offset(dev);
+ return page_to_phys(page) + ath25_dev_offset(dev);
+}
+
+static inline unsigned long
+plat_dma_addr_to_phys(struct device *dev, dma_addr_t dma_addr)
+{
+ return dma_addr - ar231x_dev_offset(dev);
+ return dma_addr - ath25_dev_offset(dev);
+}
+
+static inline void
@ -1478,7 +1478,7 @@
+#endif /* __ASM_MACH_ATH25_AR5312_REGS_H */
--- /dev/null
+++ b/arch/mips/ath25/ar5312.c
@@ -0,0 +1,474 @@
@@ -0,0 +1,467 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
@ -1536,8 +1536,7 @@
+ spurious_interrupt();
+}
+
+static asmlinkage void
+ar5312_irq_dispatch(void)
+static void ar5312_irq_dispatch(void)
+{
+ int pending = read_c0_status() & read_c0_cause();
+
@ -1558,8 +1557,7 @@
+}
+
+/* Enable the specified AR5312_MISC_IRQ interrupt */
+static void
+ar5312_misc_irq_unmask(struct irq_data *d)
+static void ar5312_misc_irq_unmask(struct irq_data *d)
+{
+ unsigned int imr;
+
@ -1569,8 +1567,7 @@
+}
+
+/* Disable the specified AR5312_MISC_IRQ interrupt */
+static void
+ar5312_misc_irq_mask(struct irq_data *d)
+static void ar5312_misc_irq_mask(struct irq_data *d)
+{
+ unsigned int imr;
+
@ -1581,12 +1578,12 @@
+}
+
+static struct irq_chip ar5312_misc_irq_chip = {
+ .name = "AR5312-MISC",
+ .name = "ar5312-misc",
+ .irq_unmask = ar5312_misc_irq_unmask,
+ .irq_mask = ar5312_misc_irq_mask,
+};
+
+static irqreturn_t ar5312_ahb_proc_handler(int cpl, void *dev_id)
+static irqreturn_t ar5312_ahb_err_handler(int cpl, void *dev_id)
+{
+ u32 proc1 = ar231x_read_reg(AR5312_PROC1);
+ u32 proc_addr = ar231x_read_reg(AR5312_PROCADDR); /* clears error */
@ -1600,26 +1597,26 @@
+ return IRQ_HANDLED;
+}
+
+static struct irqaction ar5312_ahb_proc_interrupt = {
+ .handler = ar5312_ahb_proc_handler,
+ .name = "ar5312_ahb_proc_interrupt",
+static struct irqaction ar5312_ahb_err_interrupt = {
+ .handler = ar5312_ahb_err_handler,
+ .name = "ar5312-ahb-error",
+};
+
+void __init ar5312_irq_init(void)
+void __init ar5312_arch_init_irq(void)
+{
+ int i;
+
+ if (!is_5312())
+ if (!is_ar5312())
+ return;
+
+ ar231x_irq_dispatch = ar5312_irq_dispatch;
+ ath25_irq_dispatch = ar5312_irq_dispatch;
+ for (i = 0; i < AR5312_MISC_IRQ_COUNT; i++) {
+ int irq = AR231X_MISC_IRQ_BASE + i;
+
+ irq_set_chip_and_handler(irq, &ar5312_misc_irq_chip,
+ handle_level_irq);
+ }
+ setup_irq(AR5312_MISC_IRQ_AHB_PROC, &ar5312_ahb_proc_interrupt);
+ setup_irq(AR5312_MISC_IRQ_AHB_PROC, &ar5312_ahb_err_interrupt);
+ irq_set_chained_handler(AR5312_IRQ_MISC_INTRS, ar5312_misc_irq_handler);
+}
+
@ -1724,28 +1721,28 @@
+
+int __init ar5312_init_devices(void)
+{
+ struct ar231x_boarddata *config;
+ struct ath25_boarddata *config;
+ u32 fctl = 0;
+ u8 *c;
+
+ if (!is_5312())
+ if (!is_ar5312())
+ return 0;
+
+ /* Locate board/radio config data */
+ ar231x_find_config(ar5312_flash_limit());
+ config = ar231x_board.config;
+ ath25_find_config(ar5312_flash_limit());
+ config = ath25_board.config;
+
+ /* AR2313 has CPU minor rev. 10 */
+ if ((current_cpu_data.processor_id & 0xff) == 0x0a)
+ ar231x_devtype = DEV_TYPE_AR2313;
+ ath25_soc = ATH25_SOC_AR2313;
+
+ /* AR2312 shares the same Silicon ID as AR5312 */
+ else if (config->flags & BD_ISCASPER)
+ ar231x_devtype = DEV_TYPE_AR2312;
+ ath25_soc = ATH25_SOC_AR2312;
+
+ /* Everything else is probably AR5312 or compatible */
+ else
+ ar231x_devtype = DEV_TYPE_AR5312;
+ ath25_soc = ATH25_SOC_AR5312;
+
+ /* fixup flash width */
+ fctl = ar231x_read_reg(AR5312_FLASHCTL) & FLASHCTL_MW;
@ -1778,39 +1775,39 @@
+ c--;
+ }
+
+ switch (ar231x_devtype) {
+ case DEV_TYPE_AR5312:
+ switch (ath25_soc) {
+ case ATH25_SOC_AR5312:
+ ar5312_eth0_data.macaddr = config->enet0_mac;
+ ar231x_add_ethernet(0, AR5312_ENET0, "eth0_mii",
+ AR5312_ENET0_MII, AR5312_IRQ_ENET0_INTRS,
+ &ar5312_eth0_data);
+ ath25_add_ethernet(0, AR5312_ENET0, "eth0_mii",
+ AR5312_ENET0_MII, AR5312_IRQ_ENET0_INTRS,
+ &ar5312_eth0_data);
+
+ ar5312_eth1_data.macaddr = config->enet1_mac;
+ ar231x_add_ethernet(1, AR5312_ENET1, "eth1_mii",
+ AR5312_ENET1_MII, AR5312_IRQ_ENET1_INTRS,
+ &ar5312_eth1_data);
+ ath25_add_ethernet(1, AR5312_ENET1, "eth1_mii",
+ AR5312_ENET1_MII, AR5312_IRQ_ENET1_INTRS,
+ &ar5312_eth1_data);
+
+ if (!ar231x_board.radio)
+ if (!ath25_board.radio)
+ return 0;
+
+ if (!(config->flags & BD_WLAN0))
+ break;
+
+ ar231x_add_wmac(0, AR5312_WLAN0, AR5312_IRQ_WLAN0_INTRS);
+ ath25_add_wmac(0, AR5312_WLAN0, AR5312_IRQ_WLAN0_INTRS);
+ break;
+ /*
+ * AR2312/3 ethernet uses the PHY of ENET0, but the MAC
+ * of ENET1. Atheros calls it 'twisted' for a reason :)
+ */
+ case DEV_TYPE_AR2312:
+ case DEV_TYPE_AR2313:
+ case ATH25_SOC_AR2312:
+ case ATH25_SOC_AR2313:
+ ar5312_eth1_data.reset_phy = ar5312_eth0_data.reset_phy;
+ ar5312_eth1_data.macaddr = config->enet0_mac;
+ ar231x_add_ethernet(1, AR5312_ENET1, "eth0_mii",
+ AR5312_ENET0_MII, AR5312_IRQ_ENET1_INTRS,
+ &ar5312_eth1_data);
+ ath25_add_ethernet(1, AR5312_ENET1, "eth0_mii",
+ AR5312_ENET0_MII, AR5312_IRQ_ENET1_INTRS,
+ &ar5312_eth1_data);
+
+ if (!ar231x_board.radio)
+ if (!ath25_board.radio)
+ return 0;
+ break;
+ default:
@ -1818,7 +1815,7 @@
+ }
+
+ if (config->flags & BD_WLAN1)
+ ar231x_add_wmac(1, AR5312_WLAN1, AR5312_IRQ_WLAN1_INTRS);
+ ath25_add_wmac(1, AR5312_WLAN1, AR5312_IRQ_WLAN1_INTRS);
+
+ return 0;
+}
@ -1835,10 +1832,9 @@
+ * This table is indexed by bits 5..4 of the CLOCKCTL1 register
+ * to determine the predevisor value.
+ */
+static int clockctl1_predivide_table[4] __initdata = { 1, 2, 4, 5 };
+static unsigned clockctl1_predivide_table[4] __initdata = { 1, 2, 4, 5 };
+
+static int __init
+ar5312_cpu_frequency(void)
+static unsigned __init ar5312_cpu_frequency(void)
+{
+ unsigned int scratch;
+ unsigned int predivide_mask, predivide_shift;
@ -1898,16 +1894,14 @@
+ return (40000000 / predivisor) * multiplier;
+}
+
+static inline int
+ar5312_sys_frequency(void)
+static inline unsigned ar5312_sys_frequency(void)
+{
+ return ar5312_cpu_frequency() / 4;
+}
+
+void __init
+ar5312_time_init(void)
+void __init ar5312_plat_time_init(void)
+{
+ if (!is_5312())
+ if (!is_ar5312())
+ return;
+
+ mips_hpt_frequency = ar5312_cpu_frequency() / 2;
@ -1919,7 +1913,7 @@
+ u32 memsize, memcfg, bank0AC, bank1AC;
+ u32 devid;
+
+ if (!is_5312())
+ if (!is_ar5312())
+ return;
+
+ /* Detect memory size */
@ -1934,13 +1928,12 @@
+ devid = ar231x_read_reg(AR5312_REV);
+ devid >>= AR5312_REV_WMAC_MIN_S;
+ devid &= AR5312_REV_CHIP;
+ ar231x_board.devid = (u16)devid;
+ ath25_board.devid = (u16)devid;
+}
+
+void __init
+ar5312_plat_setup(void)
+void __init ar5312_plat_mem_setup(void)
+{
+ if (!is_5312())
+ if (!is_ar5312())
+ return;
+
+ /* Clear any lingering AHB errors */
@ -1949,13 +1942,13 @@
+ ar231x_write_reg(AR5312_WD_CTRL, AR5312_WD_CTRL_IGNORE_EXPIRATION);
+
+ _machine_restart = ar5312_restart;
+ ar231x_serial_setup(AR5312_UART0, AR5312_MISC_IRQ_UART0,
+ ar5312_sys_frequency());
+ ath25_serial_setup(AR5312_UART0, AR5312_MISC_IRQ_UART0,
+ ar5312_sys_frequency());
+}
+
--- /dev/null
+++ b/arch/mips/ath25/ar2315.c
@@ -0,0 +1,430 @@
@@ -0,0 +1,418 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
@ -2026,8 +2019,7 @@
+ * Implicitly, we also define interrupt priority by
+ * choosing which to dispatch first.
+ */
+static asmlinkage void
+ar2315_irq_dispatch(void)
+static void ar2315_irq_dispatch(void)
+{
+ int pending = read_c0_status() & read_c0_cause();
+
@ -2043,8 +2035,7 @@
+ spurious_interrupt();
+}
+
+static void
+ar2315_misc_irq_unmask(struct irq_data *d)
+static void ar2315_misc_irq_unmask(struct irq_data *d)
+{
+ unsigned int imr;
+
@ -2053,8 +2044,7 @@
+ ar231x_write_reg(AR2315_IMR, imr);
+}
+
+static void
+ar2315_misc_irq_mask(struct irq_data *d)
+static void ar2315_misc_irq_mask(struct irq_data *d)
+{
+ unsigned int imr;
+
@ -2064,12 +2054,12 @@
+}
+
+static struct irq_chip ar2315_misc_irq_chip = {
+ .name = "AR2315-MISC",
+ .name = "ar2315-misc",
+ .irq_unmask = ar2315_misc_irq_unmask,
+ .irq_mask = ar2315_misc_irq_mask,
+};
+
+static irqreturn_t ar2315_ahb_proc_handler(int cpl, void *dev_id)
+static irqreturn_t ar2315_ahb_err_handler(int cpl, void *dev_id)
+{
+ ar231x_write_reg(AR2315_AHB_ERR0, AHB_ERROR_DET);
+ ar231x_read_reg(AR2315_AHB_ERR1);
@ -2080,27 +2070,26 @@
+ return IRQ_HANDLED;
+}
+
+static struct irqaction ar2315_ahb_proc_interrupt = {
+ .handler = ar2315_ahb_proc_handler,
+ .name = "ar2315_ahb_proc_interrupt",
+static struct irqaction ar2315_ahb_err_interrupt = {
+ .handler = ar2315_ahb_err_handler,
+ .name = "ar2315-ahb-error",
+};
+
+void
+ar2315_irq_init(void)
+void __init ar2315_arch_init_irq(void)
+{
+ int i;
+
+ if (!is_2315())
+ if (!is_ar2315())
+ return;
+
+ ar231x_irq_dispatch = ar2315_irq_dispatch;
+ ath25_irq_dispatch = ar2315_irq_dispatch;
+ for (i = 0; i < AR2315_MISC_IRQ_COUNT; i++) {
+ int irq = AR231X_MISC_IRQ_BASE + i;
+
+ irq_set_chip_and_handler(irq, &ar2315_misc_irq_chip,
+ handle_level_irq);
+ }
+ setup_irq(AR2315_MISC_IRQ_AHB, &ar2315_ahb_proc_interrupt);
+ setup_irq(AR2315_MISC_IRQ_AHB, &ar2315_ahb_err_interrupt);
+ irq_set_chained_handler(AR2315_IRQ_MISC_INTRS, ar2315_misc_irq_handler);
+}
+
@ -2193,8 +2182,7 @@
+ }
+};
+
+static void __init
+ar2315_init_gpio_leds(void)
+static void __init ar2315_init_gpio_leds(void)
+{
+ static char led_names[6][6];
+ int i, led = 0;
@ -2202,10 +2190,10 @@
+ ar2315_led_data.num_leds = 0;
+ for (i = 1; i < 8; i++) {
+ if ((i == AR2315_RESET_GPIO) ||
+ (i == ar231x_board.config->reset_config_gpio))
+ (i == ath25_board.config->reset_config_gpio))
+ continue;
+
+ if (i == ar231x_board.config->sys_led_gpio)
+ if (i == ath25_board.config->sys_led_gpio)
+ strcpy(led_names[led], "wlan");
+ else
+ sprintf(led_names[led], "gpio%d", i);
@ -2224,28 +2212,26 @@
+}
+#endif
+
+int __init
+ar2315_init_devices(void)
+int __init ar2315_init_devices(void)
+{
+ if (!is_2315())
+ if (!is_ar2315())
+ return 0;
+
+ /* Find board configuration */
+ ar231x_find_config(ar2315_flash_limit());
+ ar2315_eth_data.macaddr = ar231x_board.config->enet0_mac;
+ ath25_find_config(ar2315_flash_limit());
+ ar2315_eth_data.macaddr = ath25_board.config->enet0_mac;
+
+ ar2315_init_gpio_leds();
+ platform_device_register(&ar2315_wdt);
+ platform_device_register(&ar2315_spiflash);
+ ar231x_add_ethernet(0, AR2315_ENET0, "eth0_mii", AR2315_ENET0_MII,
+ AR2315_IRQ_ENET0_INTRS, &ar2315_eth_data);
+ ar231x_add_wmac(0, AR2315_WLAN0, AR2315_IRQ_WLAN0_INTRS);
+ ath25_add_ethernet(0, AR2315_ENET0, "eth0_mii", AR2315_ENET0_MII,
+ AR2315_IRQ_ENET0_INTRS, &ar2315_eth_data);
+ ath25_add_wmac(0, AR2315_WLAN0, AR2315_IRQ_WLAN0_INTRS);
+
+ return 0;
+}
+
+static void
+ar2315_restart(char *command)
+static void ar2315_restart(char *command)
+{
+ void (*mips_reset_vec)(void) = (void *)0xbfc00000;
+
@ -2273,8 +2259,7 @@
+static int clockctl1_predivide_table[4] __initdata = { 1, 2, 4, 5 };
+static int pllc_divide_table[5] __initdata = { 2, 3, 4, 6, 3 };
+
+static unsigned int __init
+ar2315_sys_clk(unsigned int clock_ctl)
+static unsigned __init ar2315_sys_clk(u32 clock_ctl)
+{
+ unsigned int pllc_ctrl, cpu_div;
+ unsigned int pllc_out, refdiv, fdiv, divby2;
@ -2311,22 +2296,19 @@
+ return pllc_out / (clk_div * cpu_div);
+}
+
+static inline unsigned int
+ar2315_cpu_frequency(void)
+static inline unsigned ar2315_cpu_frequency(void)
+{
+ return ar2315_sys_clk(ar231x_read_reg(AR2315_CPUCLK));
+}
+
+static inline unsigned int
+ar2315_apb_frequency(void)
+static inline unsigned ar2315_apb_frequency(void)
+{
+ return ar2315_sys_clk(ar231x_read_reg(AR2315_AMBACLK));
+}
+
+void __init
+ar2315_time_init(void)
+void __init ar2315_plat_time_init(void)
+{
+ if (!is_2315())
+ if (!is_ar2315())
+ return;
+
+ mips_hpt_frequency = ar2315_cpu_frequency() / 2;
@ -2337,7 +2319,7 @@
+{
+ u32 memsize, memcfg, devid;
+
+ if (!is_2315())
+ if (!is_ar2315())
+ return;
+
+ memcfg = ar231x_read_reg(AR2315_MEM_CFG);
@ -2351,28 +2333,27 @@
+ devid = ar231x_read_reg(AR2315_SREV) & AR2315_REV_CHIP;
+ switch (devid) {
+ case 0x91: /* Need to check */
+ ar231x_devtype = DEV_TYPE_AR2318;
+ ath25_soc = ATH25_SOC_AR2318;
+ break;
+ case 0x90:
+ ar231x_devtype = DEV_TYPE_AR2317;
+ ath25_soc = ATH25_SOC_AR2317;
+ break;
+ case 0x87:
+ ar231x_devtype = DEV_TYPE_AR2316;
+ ath25_soc = ATH25_SOC_AR2316;
+ break;
+ case 0x86:
+ default:
+ ar231x_devtype = DEV_TYPE_AR2315;
+ ath25_soc = ATH25_SOC_AR2315;
+ break;
+ }
+ ar231x_board.devid = devid;
+ ath25_board.devid = devid;
+}
+
+void __init
+ar2315_plat_setup(void)
+void __init ar2315_plat_mem_setup(void)
+{
+ u32 config;
+
+ if (!is_2315())
+ if (!is_ar2315())
+ return;
+
+ /* Clear any lingering AHB errors */
@ -2383,8 +2364,8 @@
+ ar231x_write_reg(AR2315_WDC, AR2315_WDC_IGNORE_EXPIRATION);
+
+ _machine_restart = ar2315_restart;
+ ar231x_serial_setup(AR2315_UART0, AR2315_MISC_IRQ_UART0,
+ ar2315_apb_frequency());
+ ath25_serial_setup(AR2315_UART0, AR2315_MISC_IRQ_UART0,
+ ar2315_apb_frequency());
+}
--- /dev/null
+++ b/arch/mips/ath25/ar2315.h
@ -2394,15 +2375,15 @@
+
+#ifdef CONFIG_SOC_AR2315
+
+void ar2315_irq_init(void);
+void ar2315_arch_init_irq(void);
+int ar2315_init_devices(void);
+void ar2315_plat_time_init(void);
+void ar2315_prom_init(void);
+void ar2315_plat_setup(void);
+void ar2315_time_init(void);
+void ar2315_plat_mem_setup(void);
+
+#else
+
+static inline void ar2315_irq_init(void)
+static inline void ar2315_arch_init_irq(void)
+{
+}
+
@ -2411,15 +2392,15 @@
+ return 0;
+}
+
+static inline void ar2315_plat_time_init(void)
+{
+}
+
+static inline void ar2315_prom_init(void)
+{
+}
+
+static inline void ar2315_plat_setup(void)
+{
+}
+
+static inline void ar2315_time_init(void)
+static inline void ar2315_plat_mem_setup(void)
+{
+}
+
@ -2434,15 +2415,15 @@
+
+#ifdef CONFIG_SOC_AR5312
+
+void ar5312_irq_init(void);
+void ar5312_arch_init_irq(void);
+int ar5312_init_devices(void);
+void ar5312_plat_time_init(void);
+void ar5312_prom_init(void);
+void ar5312_plat_setup(void);
+void ar5312_time_init(void);
+void ar5312_plat_mem_setup(void);
+
+#else
+
+static inline void ar5312_irq_init(void)
+static inline void ar5312_arch_init_irq(void)
+{
+}
+
@ -2451,15 +2432,15 @@
+ return 0;
+}
+
+static inline void ar5312_plat_time_init(void)
+{
+}
+
+static inline void ar5312_prom_init(void)
+{
+}
+
+static inline void ar5312_plat_setup(void)
+{
+}
+
+static inline void ar5312_time_init(void)
+static inline void ar5312_plat_mem_setup(void)
+{
+}
+
@ -2513,45 +2494,45 @@
+#ifndef __ATH25_DEVICES_H
+#define __ATH25_DEVICES_H
+
+enum {
+enum ath25_soc_type {
+ /* handled by ar5312.c */
+ DEV_TYPE_AR2312,
+ DEV_TYPE_AR2313,
+ DEV_TYPE_AR5312,
+ ATH25_SOC_AR2312,
+ ATH25_SOC_AR2313,
+ ATH25_SOC_AR5312,
+
+ /* handled by ar2315.c */
+ DEV_TYPE_AR2315,
+ DEV_TYPE_AR2316,
+ DEV_TYPE_AR2317,
+ DEV_TYPE_AR2318,
+ ATH25_SOC_AR2315,
+ ATH25_SOC_AR2316,
+ ATH25_SOC_AR2317,
+ ATH25_SOC_AR2318,
+
+ DEV_TYPE_UNKNOWN
+ ATH25_SOC_UNKNOWN
+};
+
+extern int ar231x_devtype;
+extern struct ar231x_board_config ar231x_board;
+extern asmlinkage void (*ar231x_irq_dispatch)(void);
+extern enum ath25_soc_type ath25_soc;
+extern struct ar231x_board_config ath25_board;
+extern void (*ath25_irq_dispatch)(void);
+
+int ar231x_find_config(u8 *flash_limit);
+void ar231x_serial_setup(u32 mapbase, int irq, unsigned int uartclk);
+int ar231x_add_wmac(int nr, u32 base, int irq);
+int ar231x_add_ethernet(int nr, u32 base, const char *mii_name, u32 mii_base,
+ int irq, void *pdata);
+int ath25_find_config(u8 *flash_limit);
+int ath25_add_ethernet(int nr, u32 base, const char *mii_name, u32 mii_base,
+ int irq, void *pdata);
+void ath25_serial_setup(u32 mapbase, int irq, unsigned int uartclk);
+int ath25_add_wmac(int nr, u32 base, int irq);
+
+static inline bool is_2315(void)
+static inline bool is_ar2315(void)
+{
+ return (current_cpu_data.cputype == CPU_4KEC);
+}
+
+static inline bool is_5312(void)
+static inline bool is_ar5312(void)
+{
+ return !is_2315();
+ return !is_ar2315();
+}
+
+#endif
--- /dev/null
+++ b/arch/mips/ath25/devices.c
@@ -0,0 +1,181 @@
@@ -0,0 +1,178 @@
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/serial.h>
@ -2566,10 +2547,10 @@
+#include "ar5312.h"
+#include "ar2315.h"
+
+struct ar231x_board_config ar231x_board;
+int ar231x_devtype = DEV_TYPE_UNKNOWN;
+struct ar231x_board_config ath25_board;
+enum ath25_soc_type ath25_soc = ATH25_SOC_UNKNOWN;
+
+static struct resource ar231x_eth0_res[] = {
+static struct resource ath25_eth0_res[] = {
+ {
+ .name = "eth0_membase",
+ .flags = IORESOURCE_MEM,
@ -2584,7 +2565,7 @@
+ }
+};
+
+static struct resource ar231x_eth1_res[] = {
+static struct resource ath25_eth1_res[] = {
+ {
+ .name = "eth1_membase",
+ .flags = IORESOURCE_MEM,
@ -2599,22 +2580,22 @@
+ }
+};
+
+static struct platform_device ar231x_eth[] = {
+static struct platform_device ath25_eth[] = {
+ {
+ .id = 0,
+ .name = "ar231x-eth",
+ .resource = ar231x_eth0_res,
+ .num_resources = ARRAY_SIZE(ar231x_eth0_res)
+ .resource = ath25_eth0_res,
+ .num_resources = ARRAY_SIZE(ath25_eth0_res)
+ },
+ {
+ .id = 1,
+ .name = "ar231x-eth",
+ .resource = ar231x_eth1_res,
+ .num_resources = ARRAY_SIZE(ar231x_eth1_res)
+ .resource = ath25_eth1_res,
+ .num_resources = ARRAY_SIZE(ath25_eth1_res)
+ }
+};
+
+static struct resource ar231x_wmac0_res[] = {
+static struct resource ath25_wmac0_res[] = {
+ {
+ .name = "wmac0_membase",
+ .flags = IORESOURCE_MEM,
@ -2625,7 +2606,7 @@
+ }
+};
+
+static struct resource ar231x_wmac1_res[] = {
+static struct resource ath25_wmac1_res[] = {
+ {
+ .name = "wmac1_membase",
+ .flags = IORESOURCE_MEM,
@ -2636,50 +2617,49 @@
+ }
+};
+
+static struct platform_device ar231x_wmac[] = {
+static struct platform_device ath25_wmac[] = {
+ {
+ .id = 0,
+ .name = "ar231x-wmac",
+ .resource = ar231x_wmac0_res,
+ .num_resources = ARRAY_SIZE(ar231x_wmac0_res),
+ .dev.platform_data = &ar231x_board,
+ .resource = ath25_wmac0_res,
+ .num_resources = ARRAY_SIZE(ath25_wmac0_res),
+ .dev.platform_data = &ath25_board,
+ },
+ {
+ .id = 1,
+ .name = "ar231x-wmac",
+ .resource = ar231x_wmac1_res,
+ .num_resources = ARRAY_SIZE(ar231x_wmac1_res),
+ .dev.platform_data = &ar231x_board,
+ .resource = ath25_wmac1_res,
+ .num_resources = ARRAY_SIZE(ath25_wmac1_res),
+ .dev.platform_data = &ath25_board,
+ },
+};
+
+static const char * const devtype_strings[] = {
+ [DEV_TYPE_AR5312] = "Atheros AR5312",
+ [DEV_TYPE_AR2312] = "Atheros AR2312",
+ [DEV_TYPE_AR2313] = "Atheros AR2313",
+ [DEV_TYPE_AR2315] = "Atheros AR2315",
+ [DEV_TYPE_AR2316] = "Atheros AR2316",
+ [DEV_TYPE_AR2317] = "Atheros AR2317",
+ [DEV_TYPE_AR2318] = "Atheros AR2318",
+ [DEV_TYPE_UNKNOWN] = "Atheros (unknown)",
+static const char * const soc_type_strings[] = {
+ [ATH25_SOC_AR5312] = "Atheros AR5312",
+ [ATH25_SOC_AR2312] = "Atheros AR2312",
+ [ATH25_SOC_AR2313] = "Atheros AR2313",
+ [ATH25_SOC_AR2315] = "Atheros AR2315",
+ [ATH25_SOC_AR2316] = "Atheros AR2316",
+ [ATH25_SOC_AR2317] = "Atheros AR2317",
+ [ATH25_SOC_AR2318] = "Atheros AR2318",
+ [ATH25_SOC_UNKNOWN] = "Atheros (unknown)",
+};
+
+const char *get_system_type(void)
+{
+ if ((ar231x_devtype >= ARRAY_SIZE(devtype_strings)) ||
+ !devtype_strings[ar231x_devtype])
+ return devtype_strings[DEV_TYPE_UNKNOWN];
+ return devtype_strings[ar231x_devtype];
+ if ((ath25_soc >= ARRAY_SIZE(soc_type_strings)) ||
+ !soc_type_strings[ath25_soc])
+ return soc_type_strings[ATH25_SOC_UNKNOWN];
+ return soc_type_strings[ath25_soc];
+}
+
+int __init
+ar231x_add_ethernet(int nr, u32 base, const char *mii_name, u32 mii_base,
+ int irq, void *pdata)
+int __init ath25_add_ethernet(int nr, u32 base, const char *mii_name,
+ u32 mii_base, int irq, void *pdata)
+{
+ struct resource *res;
+
+ ar231x_eth[nr].dev.platform_data = pdata;
+ res = &ar231x_eth[nr].resource[0];
+ ath25_eth[nr].dev.platform_data = pdata;
+ res = &ath25_eth[nr].resource[0];
+ res->start = base;
+ res->end = base + 0x2000 - 1;
+ res++;
@ -2689,11 +2669,10 @@
+ res++;
+ res->start = irq;
+ res->end = irq;
+ return platform_device_register(&ar231x_eth[nr]);
+ return platform_device_register(&ath25_eth[nr]);
+}
+
+void __init
+ar231x_serial_setup(u32 mapbase, int irq, unsigned int uartclk)
+void __init ath25_serial_setup(u32 mapbase, int irq, unsigned int uartclk)
+{
+ struct uart_port s;
+
@ -2709,22 +2688,21 @@
+ early_serial_setup(&s);
+}
+
+int __init
+ar231x_add_wmac(int nr, u32 base, int irq)
+int __init ath25_add_wmac(int nr, u32 base, int irq)
+{
+ struct resource *res;
+
+ ar231x_wmac[nr].dev.platform_data = &ar231x_board;
+ res = &ar231x_wmac[nr].resource[0];
+ ath25_wmac[nr].dev.platform_data = &ath25_board;
+ res = &ath25_wmac[nr].resource[0];
+ res->start = base;
+ res->end = base + 0x10000 - 1;
+ res++;
+ res->start = irq;
+ res->end = irq;
+ return platform_device_register(&ar231x_wmac[nr]);
+ return platform_device_register(&ath25_wmac[nr]);
+}
+
+static int __init ar231x_register_devices(void)
+static int __init ath25_register_devices(void)
+{
+ ar5312_init_devices();
+ ar2315_init_devices();
@ -2732,4 +2710,4 @@
+ return 0;
+}
+
+device_initcall(ar231x_register_devices);
+device_initcall(ath25_register_devices);

2
target/linux/atheros/patches-3.18/101-early-printk-support.patch
View File

@ -34,7 +34,7 @@
+ static void __iomem *base;
+
+ if (unlikely(base == NULL)) {
+ if (is_2315())
+ if (is_ar2315())
+ base = (void __iomem *)(KSEG1ADDR(AR2315_UART0));
+ else
+ base = (void __iomem *)(KSEG1ADDR(AR5312_UART0));

4
target/linux/atheros/patches-3.18/102-ar5312_gpio.patch
View File

@ -10,7 +10,7 @@
config SOC_AR2315
--- a/arch/mips/ath25/ar5312.c
+++ b/arch/mips/ath25/ar5312.c
@@ -190,6 +190,22 @@ static struct platform_device ar5312_phy
@@ -187,6 +187,22 @@ static struct platform_device ar5312_phy
.num_resources = 1,
};
@ -33,7 +33,7 @@
#ifdef CONFIG_LEDS_GPIO
static struct gpio_led ar5312_leds[] = {
{ .name = "wlan", .gpio = 0, .active_low = 1, },
@@ -280,6 +296,8 @@ int __init ar5312_init_devices(void)
@@ -277,6 +293,8 @@ int __init ar5312_init_devices(void)
platform_device_register(&ar5312_physmap_flash);

8
target/linux/atheros/patches-3.18/103-ar2315_gpio.patch
View File

@ -8,7 +8,7 @@
default y
--- a/arch/mips/ath25/ar2315.c
+++ b/arch/mips/ath25/ar2315.c
@@ -211,6 +211,34 @@ static struct platform_device ar2315_wdt
@@ -207,6 +207,34 @@ static struct platform_device ar2315_wdt
.num_resources = ARRAY_SIZE(ar2315_wdt_res)
};
@ -43,9 +43,9 @@
/*
* NB: We use mapping size that is larger than the actual flash size,
* but this shouldn't be a problem here, because the flash will simply
@@ -276,6 +304,7 @@ ar2315_init_devices(void)
ar231x_find_config(ar2315_flash_limit());
ar2315_eth_data.macaddr = ar231x_board.config->enet0_mac;
@@ -270,6 +298,7 @@ int __init ar2315_init_devices(void)
ath25_find_config(ar2315_flash_limit());
ar2315_eth_data.macaddr = ath25_board.config->enet0_mac;
+ platform_device_register(&ar2315_gpio);
ar2315_init_gpio_leds();

10
target/linux/atheros/patches-3.18/105-ar2315_pci.patch
View File

@ -371,7 +371,7 @@
+ default y
--- a/arch/mips/ath25/ar2315.c
+++ b/arch/mips/ath25/ar2315.c
@@ -77,6 +77,10 @@ ar2315_irq_dispatch(void)
@@ -76,6 +76,10 @@ static void ar2315_irq_dispatch(void)
do_IRQ(AR2315_IRQ_WLAN0_INTRS);
else if (pending & CAUSEF_IP4)
do_IRQ(AR2315_IRQ_ENET0_INTRS);
@ -382,9 +382,9 @@
else if (pending & CAUSEF_IP2)
do_IRQ(AR2315_IRQ_MISC_INTRS);
else if (pending & CAUSEF_IP7)
@@ -457,3 +461,18 @@ ar2315_plat_setup(void)
ar231x_serial_setup(AR2315_UART0, AR2315_MISC_IRQ_UART0,
ar2315_apb_frequency());
@@ -445,3 +449,18 @@ void __init ar2315_plat_mem_setup(void)
ath25_serial_setup(AR2315_UART0, AR2315_MISC_IRQ_UART0,
ar2315_apb_frequency());
}
+
+#ifdef CONFIG_PCI_AR2315
@ -392,7 +392,7 @@
+{
+ struct platform_device *pdev;
+
+ if (!is_2315() || ar231x_devtype != DEV_TYPE_AR2315)
+ if (!is_ar2315() || ath25_soc != ATH25_SOC_AR2315)
+ return -ENODEV;
+
+ pdev = platform_device_register_simple("ar2315-pci", -1, NULL, 0);

4
target/linux/atheros/patches-3.18/210-reset_button.patch
View File

@ -29,7 +29,7 @@
+ struct gpio_keys_button *p;
+ int err;
+
+ if (ar231x_board.config->reset_config_gpio == 0xffff)
+ if (ath25_board.config->reset_config_gpio == 0xffff)
+ return -ENODEV;
+
+ p = kzalloc(sizeof(*p), GFP_KERNEL);
@ -40,7 +40,7 @@
+ p->type = EV_KEY;
+ p->code = KEY_RESTART;
+ p->debounce_interval = 60;
+ p->gpio = ar231x_board.config->reset_config_gpio;
+ p->gpio = ath25_board.config->reset_config_gpio;
+
+ memset(&pdata, 0, sizeof(pdata));
+ pdata.poll_interval = 20;