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ar71xx: allow to register the NAND flash controller on the QCA955x

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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

SVN-Revision: 34945
This commit is contained in:
Gabor Juhos 2013-01-01 13:10:36 +00:00
parent 2c77e5d7b3
commit 66efec6783
1 changed files with 44 additions and 8 deletions
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52
target/linux/ar71xx/files/arch/mips/ath79/dev-nfc.c
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@ -38,6 +38,22 @@ static struct platform_device ath79_nfc_device = {
},
};
static void __init ath79_nfc_init_resource(struct resource res[2],
unsigned long base,
unsigned long size,
int irq)
{
memset(res, 0, sizeof(res));
res[0].flags = IORESOURCE_MEM;
res[0].start = base;
res[0].end = base + size - 1;
res[1].flags = IORESOURCE_IRQ;
res[1].start = irq;
res[1].end = irq;
}
static void ar934x_nfc_hw_reset(bool active)
{
if (active) {
@ -57,16 +73,34 @@ static void ar934x_nfc_hw_reset(bool active)
static void ar934x_nfc_setup(void)
{
ath79_nfc_resources[0].start = AR934X_NFC_BASE;
ath79_nfc_resources[0].end = AR934X_NFC_BASE + AR934X_NFC_SIZE - 1;
ath79_nfc_resources[0].flags = IORESOURCE_MEM;
ath79_nfc_resources[1].start = ATH79_MISC_IRQ(21);
ath79_nfc_resources[1].end = ATH79_MISC_IRQ(21);
ath79_nfc_resources[1].flags = IORESOURCE_IRQ;
ath79_nfc_data.hw_reset = ar934x_nfc_hw_reset;
ath79_nfc_init_resource(ath79_nfc_resources,
AR934X_NFC_BASE, AR934X_NFC_SIZE,
ATH79_MISC_IRQ(21));
platform_device_register(&ath79_nfc_device);
}
static void qca955x_nfc_hw_reset(bool active)
{
if (active) {
ath79_device_reset_set(QCA955X_RESET_NANDF);
udelay(250);
} else {
ath79_device_reset_clear(QCA955X_RESET_NANDF);
udelay(100);
}
}
static void qca955x_nfc_setup(void)
{
ath79_nfc_data.hw_reset = qca955x_nfc_hw_reset;
ath79_nfc_init_resource(ath79_nfc_resources,
QCA955X_NFC_BASE, QCA955X_NFC_SIZE,
ATH79_MISC_IRQ(21));
platform_device_register(&ath79_nfc_device);
}
@ -95,6 +129,8 @@ void __init ath79_register_nfc(void)
{
if (soc_is_ar934x())
ar934x_nfc_setup();
else if (soc_is_qca955x())
qca955x_nfc_setup();
else
BUG();
}