* remove references to gpio_dev * make vmmc driver register its own memory and dont rely on arch code to do so * makes any Danube board with a CFI commandset 2 NOR flash chip functional again * fixes filenames of downloaded firmwares
thanks, Ithamar R. Adema SVN-Revision: 22515
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@ -72,6 +72,7 @@ FW_DIR:=lib/firmware
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ifeq ($(CONFIG_VOICE_CPE_VMMC_WITH_DEVICE_DANUBE_extract),y)
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CONFIGURE_ARGS += --with-device=DANUBE
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FW_TARGET:=danube_firmware.bin
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FW_SOURCE:=danube_firmware.bin
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FW_URL:=http://www.arcor.de/hilfe/files/pdf/
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FW_FILE=arcor_A800_452CPW_FW_1.02.206(20081201).bin
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FW_MD5SUM:=19d9af4e369287a0f0abaed415cdac10
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@ -82,6 +83,7 @@ endif
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ifeq ($(CONFIG_VOICE_CPE_VMMC_WITH_DEVICE_DANUBE),y)
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CONFIGURE_ARGS += --with-device=DANUBE
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FW_SOURCE:=voip_R12.1.0.1.0-enc.bin
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FW_TARGET:=danube_firmware.bin
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FW_FILE=fw_voip_danube-12.1.0.1.0.tar.gz
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FW_MD5SUM:=51868b88dee9dbc65d3dbba355ded91c
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@ -152,7 +154,7 @@ endef
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define KernelPackage/ifx-vmmc/install
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$(INSTALL_DIR) $(1)/etc/init.d $(1)/$(FW_DIR)
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$(INSTALL_BIN) ./files/vmmc.init $(1)/etc/init.d/vmmc
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$(CP) $(PKG_BUILD_DIR)/firmware/$(FW_TARGET) $(1)/$(FW_DIR)/$(FW_TARGET)
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$(CP) $(PKG_BUILD_DIR)/firmware/$(FW_SOURCE) $(1)/$(FW_DIR)/$(FW_TARGET)
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$(CP) $(PKG_BUILD_DIR)/coef/$(COEF_TARGET) $(1)/$(FW_DIR)/$(COEF_TARGET)
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endef
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@ -351,7 +351,7 @@
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timer = TIMER1A;
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--- a/src/mps/drv_mps_vmmc_danube.c
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+++ b/src/mps/drv_mps_vmmc_danube.c
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@@ -32,9 +32,22 @@
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@@ -32,9 +32,20 @@
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#include "ifxos_select.h"
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#include "ifxos_interrupt.h"
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@ -363,12 +363,10 @@
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+# include <asm/mach-ifxmips/ifxmips_irq.h>
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+# include <asm/mach-ifxmips/ifxmips_gptu.h>
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+# include <asm/mach-ifxmips/ifxmips_prom.h>
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+# include <linux/dma-mapping.h>
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+
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+# define IFX_RCU_RST_REQ IFXMIPS_RCU_RST
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+# define IFX_RCU_RST_REQ_CPU1 IFXMIPS_RCU_RST_CPU1
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+
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+# define ifx_get_cp1_base prom_get_cp1_base
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+# define ifx_get_cp1_size prom_get_cp1_size
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+#else
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+# include <asm/ifx/ifx_regs.h>
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+# include <asm/ifx_vpe.h>
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@ -377,6 +375,30 @@
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#include "drv_mps_vmmc.h"
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#include "drv_mps_vmmc_dbg.h"
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@@ -72,6 +71,23 @@ volatile IFX_uint32_t *danube_cp1_base;
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/* Local function definition */
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/* ============================= */
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+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
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+IFX_uint32_t ifx_get_cp1_size(IFX_void_t)
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+{
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+ return 2;
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+}
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+
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+IFX_uint32_t *ifx_get_cp1_base(IFX_void_t)
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+{
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+ if (!danube_cp1_base) {
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+ dma_addr_t dma;
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+ danube_cp1_base = dma_alloc_coherent(NULL, ifx_get_cp1_size()<<20, &dma, GFP_ATOMIC);
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+ }
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+
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+ return (IFX_uint32_t*)danube_cp1_base;
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+}
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+#endif
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+
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/******************************************************************************
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* DANUBE Specific Routines
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******************************************************************************/
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@@ -119,6 +132,15 @@ IFX_int32_t ifx_mps_download_firmware (m
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}
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@ -60,9 +60,6 @@ easy50812_init(void)
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{
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ifxmips_register_gpio();
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//printk("ifxmips_register_gpio_dev\n");
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//ifxmips_register_gpio_dev();
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ifxmips_register_mtd(&easy50812_flash_data);
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ifxmips_register_leds(easy50812_leds, ARRAY_SIZE(easy50812_leds));
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@ -20,19 +20,6 @@
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#include <ifxmips.h>
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#include <ifxmips_irq.h>
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/* gpiodev */
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static struct platform_device ifxmips_gpio_dev =
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{
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.name = "GPIODEV",
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.num_resources = 1,
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};
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void __init
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ifxmips_register_gpio_dev(void)
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{
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platform_device_register(&ifxmips_gpio_dev);
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}
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/* gpio leds */
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#ifdef CONFIG_LEDS_GPIO
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static struct gpio_led_platform_data ifxmips_gpio_led_data;
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@ -3,7 +3,6 @@
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#include <ifxmips_platform.h>
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void __init ifxmips_register_gpio_dev(void);
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void __init ifxmips_register_gpio_leds(struct gpio_led *leds, int cnt);
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void __init ifxmips_register_leds(struct gpio_led *leds, int cnt);
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void __init ifxmips_register_mtd(struct physmap_flash_data *pdata);
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@ -9,10 +9,6 @@
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#include <ifxmips.h>
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#include <ifxmips_prom.h>
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/* for voice cpu (MIPS24K) */
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unsigned int *prom_cp1_base;
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unsigned int prom_cp1_size = 0;
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/* for Multithreading (APRP) on MIPS34K */
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unsigned long physical_memsize;
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@ -21,21 +17,6 @@ prom_free_prom_memory(void)
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{
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}
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unsigned int*
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prom_get_cp1_base(void)
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{
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return prom_cp1_base;
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}
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EXPORT_SYMBOL(prom_get_cp1_base);
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unsigned int
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prom_get_cp1_size(void)
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{
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/* return size im MB */
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return prom_cp1_size>>20;
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}
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EXPORT_SYMBOL(prom_get_cp1_size);
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extern unsigned char ifxmips_ethaddr[6];
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int cmdline_mac = 0;
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@ -115,18 +96,6 @@ static void __init prom_init_cmdline(void)
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}
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memsize *= 1024 * 1024;
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/* only on Twinpass/Danube a second CPU is used for Voice */
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if ((cpu_data[0].cputype == CPU_24K) && (prom_cp1_size))
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{
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#define CP1_SIZE 2 << 20
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prom_cp1_size = CP1_SIZE;
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memsize -= prom_cp1_size;
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prom_cp1_base = (unsigned int *)KSEG1ADDR(memsize);
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early_printf("Using %dMB Ram and reserving %dMB for cp1\n",
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memsize>>20, prom_cp1_size>>20);
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}
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add_memory_region(0x00000000, memsize, BOOT_MEM_RAM);
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}
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@ -61,8 +61,6 @@ easy4010_init(void)
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{
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ifxmips_register_gpio();
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ifxmips_register_gpio_dev();
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ifxmips_register_mtd(&easy4010_flash_data);
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ifxmips_register_leds(easy4010_leds, ARRAY_SIZE(easy4010_leds));
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@ -61,8 +61,6 @@ easy50712_init(void)
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{
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ifxmips_register_gpio();
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ifxmips_register_gpio_dev();
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ifxmips_register_mtd(&easy50712_flash_data);
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ifxmips_register_leds(easy50712_leds, ARRAY_SIZE(easy50712_leds));
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@ -19,8 +19,6 @@
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#define _IFXPROM_H__
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extern void early_printf(const char *fmt, ...);
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extern u32 *prom_get_cp1_base(void);
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extern u32 prom_get_cp1_size(void);
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extern int ifxmips_has_brn_block(void);
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#endif
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case FL_WRITING:
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--- a/drivers/mtd/chips/cfi_cmdset_0002.c
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+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
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@@ -1068,7 +1068,9 @@ static int __xipram do_write_oneword(str
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@@ -39,7 +39,11 @@
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#include <linux/mtd/xip.h>
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#define AMD_BOOTLOC_BUG
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-#define FORCE_WORD_WRITE 0
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+#ifdef CONFIG_IFXMIPS
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+# define FORCE_WORD_WRITE 1
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+#else
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+# define FORCE_WORD_WRITE 0
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+#endif
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#define MAX_WORD_RETRIES 3
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@@ -1096,7 +1096,9 @@ static int __xipram do_write_oneword(str
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int retry_cnt = 0;
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adr += chip->start;
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