fixes timer issues
SVN-Revision: 11102
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ace5c1dac5
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40881701d0
@ -96,13 +96,21 @@ ifxmips_get_cpu_ver (void)
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}
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EXPORT_SYMBOL(ifxmips_get_cpu_ver);
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void
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ifxmips_time_init (void)
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static __inline__ u32 get_counter_resolution(void)
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{
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mips_hpt_frequency = ifxmips_get_cpu_hz() / 2;
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r4k_offset = mips_hpt_frequency / HZ;
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printk("mips_hpt_frequency:%d\n", mips_hpt_frequency);
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printk("r4k_offset: %08x(%d)\n", r4k_offset, r4k_offset);
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u32 res;
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__asm__ __volatile__(
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".set push\n"
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".set mips32r2\n"
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".set noreorder\n"
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"rdhwr %0, $3\n"
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"ehb\n"
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".set pop\n"
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: "=&r" (res)
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: /* no input */
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: "memory");
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instruction_hazard();
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return res;
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}
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int
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@ -117,9 +125,9 @@ ifxmips_be_handler(struct pt_regs *regs, int is_fixup)
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void __init
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plat_time_init (void)
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{
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mips_hpt_frequency = ifxmips_get_cpu_hz()/get_counter_resolution();
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r4k_cur = (read_c0_count() + r4k_offset);
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write_c0_compare(r4k_cur);
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ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_GPT | IFXMIPS_PMU_PWDCR_FPI);
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writel(0x100, IFXMIPS_GPTU_GPT_CLC);
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@ -130,7 +138,7 @@ plat_time_init (void)
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extern const char* get_system_type (void);
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void (*board_time_init)(void);
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//void (*board_time_init)(void);
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void __init
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plat_mem_setup (void)
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{
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@ -144,7 +152,7 @@ plat_mem_setup (void)
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write_c0_status(status);
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ifxmips_reboot_setup();
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board_time_init = ifxmips_time_init;
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// board_time_init = ifxmips_time_init;
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board_be_handler = &ifxmips_be_handler;
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ioport_resource.start = IOPORT_RESOURCE_START;
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@ -1,8 +1,8 @@
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Index: linux-2.6.25/arch/mips/Kconfig
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Index: linux-2.6.25.1/arch/mips/Kconfig
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===================================================================
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--- linux-2.6.25.orig/arch/mips/Kconfig 2008-05-05 08:35:34.000000000 +0100
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+++ linux-2.6.25/arch/mips/Kconfig 2008-05-05 08:35:46.000000000 +0100
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@@ -78,6 +78,17 @@
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--- linux-2.6.25.1.orig/arch/mips/Kconfig 2008-05-10 01:03:55.000000000 +0100
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+++ linux-2.6.25.1/arch/mips/Kconfig 2008-05-10 01:09:11.000000000 +0100
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@@ -78,6 +78,19 @@
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select SYS_SUPPORTS_LITTLE_ENDIAN
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select GENERIC_HARDIRQS_NO__DO_IRQ
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@ -10,6 +10,8 @@ Index: linux-2.6.25/arch/mips/Kconfig
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+ bool "IFXMips support"
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+ select DMA_NONCOHERENT
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+ select IRQ_CPU
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+ select CEVT_R4K
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+ select CSRC_R4K
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+ select SYS_HAS_CPU_MIPS32_R1
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+ select HAVE_STD_PC_SERIAL_PORT
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+ select SYS_SUPPORTS_BIG_ENDIAN
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@ -20,10 +22,10 @@ Index: linux-2.6.25/arch/mips/Kconfig
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config MACH_DECSTATION
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bool "DECstations"
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select BOOT_ELF32
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Index: linux-2.6.25/arch/mips/Makefile
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Index: linux-2.6.25.1/arch/mips/Makefile
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===================================================================
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--- linux-2.6.25.orig/arch/mips/Makefile 2008-05-05 08:35:35.000000000 +0100
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+++ linux-2.6.25/arch/mips/Makefile 2008-05-05 08:35:46.000000000 +0100
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--- linux-2.6.25.1.orig/arch/mips/Makefile 2008-05-10 01:04:02.000000000 +0100
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+++ linux-2.6.25.1/arch/mips/Makefile 2008-05-10 01:04:03.000000000 +0100
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@@ -282,6 +282,13 @@
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cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt
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load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
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@ -38,10 +40,10 @@ Index: linux-2.6.25/arch/mips/Makefile
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#
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# DECstation family
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#
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Index: linux-2.6.25/include/asm-mips/bootinfo.h
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Index: linux-2.6.25.1/include/asm-mips/bootinfo.h
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===================================================================
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--- linux-2.6.25.orig/include/asm-mips/bootinfo.h 2008-05-05 08:35:35.000000000 +0100
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+++ linux-2.6.25/include/asm-mips/bootinfo.h 2008-05-05 08:35:46.000000000 +0100
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--- linux-2.6.25.1.orig/include/asm-mips/bootinfo.h 2008-05-10 01:03:55.000000000 +0100
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+++ linux-2.6.25.1/include/asm-mips/bootinfo.h 2008-05-10 01:04:03.000000000 +0100
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@@ -94,6 +94,12 @@
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#define MACH_MSP7120_FPGA 5 /* PMC-Sierra MSP7120 Emulation */
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#define MACH_MSP_OTHER 255 /* PMC-Sierra unknown board type */
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@ -55,3 +57,15 @@ Index: linux-2.6.25/include/asm-mips/bootinfo.h
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#define CL_SIZE COMMAND_LINE_SIZE
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extern char *system_type;
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Index: linux-2.6.25.1/arch/mips/kernel/traps.c
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===================================================================
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--- linux-2.6.25.1.orig/arch/mips/kernel/traps.c 2008-05-10 01:09:32.000000000 +0100
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+++ linux-2.6.25.1/arch/mips/kernel/traps.c 2008-05-10 01:10:07.000000000 +0100
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@@ -1379,6 +1379,7 @@
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*/
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if (cpu_has_mips_r2) {
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cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
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+ cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
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cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
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if (cp0_perfcount_irq == cp0_compare_irq)
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cp0_perfcount_irq = -1;
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