ar71xx: fix QCA955X_EHCI_SIZE
SVN-Revision: 33360
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@ -86,7 +86,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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+#define QCA955X_EHCI0_BASE 0x1b000000
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+#define QCA955X_EHCI1_BASE 0x1b400000
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+#define QCA955X_EHCI_SIZE 0x1000
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+#define QCA955X_EHCI_SIZE 0x200
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+
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/*
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* DDR_CTRL block
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@ -67,4 +67,4 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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+#define QCA955X_WMAC_SIZE 0x20000
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#define QCA955X_EHCI0_BASE 0x1b000000
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#define QCA955X_EHCI1_BASE 0x1b400000
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#define QCA955X_EHCI_SIZE 0x1000
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#define QCA955X_EHCI_SIZE 0x200
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@ -39,7 +39,7 @@
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@@ -112,6 +122,8 @@
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#define QCA955X_EHCI0_BASE 0x1b000000
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#define QCA955X_EHCI1_BASE 0x1b400000
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#define QCA955X_EHCI_SIZE 0x1000
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#define QCA955X_EHCI_SIZE 0x200
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+#define QCA955X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000)
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+#define QCA955X_GMAC_SIZE 0x40
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