MakeTemplates/c/Makefile

.SUFFIXES:
include config.mk

OBJ := $(SRC:.c=.o)

all: $(OBJ) $(OUT)
%.o: %.c
	$(CC) $< -c $(CFLAGS) -o "$@"
clean:
	rm -f $(OBJ) $(OUT)

ifneq ($(OUT),)
$(OUT): $(OBJ)
	$(CC) $^ $(LDFLAGS) -o "$@"
endif

.PHONY: all clean
Add formatters and new things 2022-03-29 13:55:31 +00:00			`.SUFFIXES:`
Initial templates 2021-11-21 17:06:20 +00:00			`include config.mk`

Add formatters and new things 2022-03-29 13:55:31 +00:00			`OBJ := $(SRC:.c=.o)`
Initial templates 2021-11-21 17:06:20 +00:00
Add formatters and new things 2022-03-29 13:55:31 +00:00			`all: $(OBJ) $(OUT)`
Initial templates 2021-11-21 17:06:20 +00:00			`%.o: %.c`
Argument order matters 2023-12-08 19:58:57 +00:00			`$(CC) $< -c $(CFLAGS) -o "$@"`
Initial templates 2021-11-21 17:06:20 +00:00			`clean:`
Add formatters and new things 2022-03-29 13:55:31 +00:00			`rm -f $(OBJ) $(OUT)`
Initial templates 2021-11-21 17:06:20 +00:00
Add formatters and new things 2022-03-29 13:55:31 +00:00			`ifneq ($(OUT),)`
			`$(OUT): $(OBJ)`
Argument order matters 2023-12-08 19:58:57 +00:00			`$(CC) $^ $(LDFLAGS) -o "$@"`
Initial templates 2021-11-21 17:06:20 +00:00			`endif`

			`.PHONY: all clean`