[amd] firmware: fix IOREG access
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ed604594d3
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@ -40,11 +40,11 @@ Place, Suite 330, Boston, MA 02111-1307 USA
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u32 amdgpu_io_rreg(struct amd_fake_dev *adev, u32 reg)
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{
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if ((reg * 4) < adev_to_amd_private(adev)->rio_mem_size)
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return ioread32(adev_to_amd_private(adev)->rio_mem + (reg * 4));
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return ioread32(adev_to_amd_private(adev)->rio_mem + reg);
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else
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{
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iowrite32((reg * 4), adev_to_amd_private(adev)->rio_mem + (mmMM_INDEX * 4));
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return ioread32(adev_to_amd_private(adev)->rio_mem + (mmMM_DATA * 4));
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iowrite32((reg * 4), adev_to_amd_private(adev)->rio_mem + mmMM_INDEX);
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return ioread32(adev_to_amd_private(adev)->rio_mem + mmMM_DATA);
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}
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}
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@ -60,11 +60,11 @@ u32 amdgpu_io_rreg(struct amd_fake_dev *adev, u32 reg)
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void amdgpu_io_wreg(struct amd_fake_dev *adev, u32 reg, u32 v)
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{
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if ((reg * 4) < adev_to_amd_private(adev)->rio_mem_size)
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iowrite32(v, adev_to_amd_private(adev)->rio_mem + (reg * 4));
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iowrite32(v, adev_to_amd_private(adev)->rio_mem + reg);
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else
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{
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iowrite32((reg * 4), adev_to_amd_private(adev)->rio_mem + (mmMM_INDEX * 4));
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iowrite32(v, adev_to_amd_private(adev)->rio_mem + (mmMM_DATA * 4));
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iowrite32((reg * 4), adev_to_amd_private(adev)->rio_mem + mmMM_INDEX);
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iowrite32(v, adev_to_amd_private(adev)->rio_mem + mmMM_DATA);
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}
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}
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