816 lines
18 KiB
Diff
816 lines
18 KiB
Diff
From 846ef7748fa9124c8eea76e2d5e833fa69b3ef7c Mon Sep 17 00:00:00 2001
|
|
From: Jonas Karlman <jonas@kwiboo.se>
|
|
Date: Thu, 27 Jun 2024 21:17:31 +0000
|
|
Subject: [PATCH] arm64: dts: rockchip: Add Radxa ROCK 3B
|
|
|
|
The Radxa ROCK 3B is a single-board computer based on the Pico-ITX form
|
|
factor (100mm x 75mm). Two versions of the ROCK 3B exists, a community
|
|
version based on the RK3568 SoC and an industrial version based on the
|
|
RK3568J SoC.
|
|
|
|
Add initial support for eMMC, SD-card, Ethernet, HDMI, PCIe and USB.
|
|
|
|
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
|
Link: https://lore.kernel.org/r/20240627211737.1985549-3-jonas@kwiboo.se
|
|
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
---
|
|
arch/arm64/boot/dts/rockchip/Makefile | 1 +
|
|
.../boot/dts/rockchip/rk3568-rock-3b.dts | 781 ++++++++++++++++++
|
|
2 files changed, 782 insertions(+)
|
|
create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-rock-3b.dts
|
|
|
|
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
|
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
|
@@ -101,6 +101,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-od
|
|
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
|
|
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb
|
|
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
|
|
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3b.dtb
|
|
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb
|
|
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6b-io.dtb
|
|
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3b.dts
|
|
@@ -0,0 +1,781 @@
|
|
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
+
|
|
+/dts-v1/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+#include <dt-bindings/leds/common.h>
|
|
+#include <dt-bindings/pinctrl/rockchip.h>
|
|
+#include <dt-bindings/soc/rockchip,vop2.h>
|
|
+#include "rk3568.dtsi"
|
|
+
|
|
+/ {
|
|
+ model = "Radxa ROCK 3B";
|
|
+ compatible = "radxa,rock-3b", "rockchip,rk3568";
|
|
+
|
|
+ aliases {
|
|
+ ethernet0 = &gmac0;
|
|
+ ethernet1 = &gmac1;
|
|
+ mmc0 = &sdhci;
|
|
+ mmc1 = &sdmmc0;
|
|
+ mmc2 = &sdmmc2;
|
|
+ };
|
|
+
|
|
+ chosen {
|
|
+ stdout-path = "serial2:1500000n8";
|
|
+ };
|
|
+
|
|
+ hdmi-con {
|
|
+ compatible = "hdmi-connector";
|
|
+ type = "a";
|
|
+
|
|
+ port {
|
|
+ hdmi_con_in: endpoint {
|
|
+ remote-endpoint = <&hdmi_out_con>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ ir-receiver {
|
|
+ compatible = "gpio-ir-receiver";
|
|
+ gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pwm3_ir>;
|
|
+ };
|
|
+
|
|
+ leds {
|
|
+ compatible = "gpio-leds";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&led>;
|
|
+
|
|
+ led-0 {
|
|
+ color = <LED_COLOR_ID_GREEN>;
|
|
+ default-state = "on";
|
|
+ function = LED_FUNCTION_HEARTBEAT;
|
|
+ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
|
|
+ linux,default-trigger = "heartbeat";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* pi6c pcie clock generator */
|
|
+ vcc3v3_pi6c_03: regulator-3v3-vcc-pi6c-03 {
|
|
+ compatible = "regulator-fixed";
|
|
+ enable-active-high;
|
|
+ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pcie_pwren_h>;
|
|
+ regulator-name = "vcc3v3_pi6c_03";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ startup-delay-us = <10000>;
|
|
+ vin-supply = <&vcc5v0_sys>;
|
|
+ };
|
|
+
|
|
+ vcc3v3_sys: regulator-3v3-vcc-sys {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "vcc3v3_sys";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ vin-supply = <&vcc5v0_sys>;
|
|
+ };
|
|
+
|
|
+ vcc3v3_sys2: regulator-3v3-vcc-sys2 {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "vcc3v3_sys2";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ vin-supply = <&vcc5v0_sys>;
|
|
+ };
|
|
+
|
|
+ vcc5v0_sys: regulator-5v0-vcc-sys {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "vcc5v0_sys";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <5000000>;
|
|
+ regulator-max-microvolt = <5000000>;
|
|
+ };
|
|
+
|
|
+ vcc5v0_usb_host: regulator-5v0-vcc-usb-host {
|
|
+ compatible = "regulator-fixed";
|
|
+ enable-active-high;
|
|
+ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&usb_host_pwren_h>;
|
|
+ regulator-name = "vcc5v0_usb_host";
|
|
+ regulator-min-microvolt = <5000000>;
|
|
+ regulator-max-microvolt = <5000000>;
|
|
+ vin-supply = <&vcc5v0_sys>;
|
|
+ };
|
|
+
|
|
+ vcc5v0_usb_otg: regulator-5v0-vcc-usb-otg {
|
|
+ compatible = "regulator-fixed";
|
|
+ enable-active-high;
|
|
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&usb_otg_pwren_h>;
|
|
+ regulator-name = "vcc5v0_usb_otg";
|
|
+ regulator-min-microvolt = <5000000>;
|
|
+ regulator-max-microvolt = <5000000>;
|
|
+ vin-supply = <&vcc5v0_sys>;
|
|
+ };
|
|
+
|
|
+ sdio_pwrseq: sdio-pwrseq {
|
|
+ compatible = "mmc-pwrseq-simple";
|
|
+ clocks = <&rk809 1>;
|
|
+ clock-names = "ext_clock";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&wifi_reg_on_h>;
|
|
+ post-power-on-delay-ms = <100>;
|
|
+ power-off-delay-us = <5000000>;
|
|
+ reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+
|
|
+ sound {
|
|
+ compatible = "simple-audio-card";
|
|
+ simple-audio-card,format = "i2s";
|
|
+ simple-audio-card,name = "Analog RK809";
|
|
+ simple-audio-card,mclk-fs = <256>;
|
|
+
|
|
+ simple-audio-card,cpu {
|
|
+ sound-dai = <&i2s1_8ch>;
|
|
+ };
|
|
+
|
|
+ simple-audio-card,codec {
|
|
+ sound-dai = <&rk809>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&combphy0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&combphy1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&combphy2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&cpu0 {
|
|
+ cpu-supply = <&vdd_cpu>;
|
|
+};
|
|
+
|
|
+&cpu1 {
|
|
+ cpu-supply = <&vdd_cpu>;
|
|
+};
|
|
+
|
|
+&cpu2 {
|
|
+ cpu-supply = <&vdd_cpu>;
|
|
+};
|
|
+
|
|
+&cpu3 {
|
|
+ cpu-supply = <&vdd_cpu>;
|
|
+};
|
|
+
|
|
+&gmac0 {
|
|
+ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
|
|
+ assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
|
|
+ clock_in_out = "input";
|
|
+ phy-handle = <&rgmii_phy0>;
|
|
+ phy-mode = "rgmii-id";
|
|
+ phy-supply = <&vcc_3v3>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&gmac0_miim
|
|
+ &gmac0_tx_bus2
|
|
+ &gmac0_rx_bus2
|
|
+ &gmac0_rgmii_clk
|
|
+ &gmac0_rgmii_bus
|
|
+ &gmac0_clkinout>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&gmac1 {
|
|
+ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
|
|
+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
|
|
+ clock_in_out = "input";
|
|
+ phy-handle = <&rgmii_phy1>;
|
|
+ phy-mode = "rgmii-id";
|
|
+ phy-supply = <&vcc_3v3>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&gmac1m1_miim
|
|
+ &gmac1m1_tx_bus2
|
|
+ &gmac1m1_rx_bus2
|
|
+ &gmac1m1_rgmii_clk
|
|
+ &gmac1m1_rgmii_bus
|
|
+ &gmac1m1_clkinout>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&gpu {
|
|
+ mali-supply = <&vdd_gpu>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&hdmi {
|
|
+ avdd-0v9-supply = <&vdda0v9_image>;
|
|
+ avdd-1v8-supply = <&vcca1v8_image>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&hdmi_in {
|
|
+ hdmi_in_vp0: endpoint {
|
|
+ remote-endpoint = <&vp0_out_hdmi>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&hdmi_out {
|
|
+ hdmi_out_con: endpoint {
|
|
+ remote-endpoint = <&hdmi_con_in>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&hdmi_sound {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&i2c0 {
|
|
+ status = "okay";
|
|
+
|
|
+ vdd_cpu: regulator@1c {
|
|
+ compatible = "tcs,tcs4525";
|
|
+ reg = <0x1c>;
|
|
+ fcs,suspend-voltage-selector = <1>;
|
|
+ regulator-name = "vdd_cpu";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <800000>;
|
|
+ regulator-max-microvolt = <1150000>;
|
|
+ regulator-ramp-delay = <2300>;
|
|
+ vin-supply = <&vcc5v0_sys>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rk809: pmic@20 {
|
|
+ compatible = "rockchip,rk809";
|
|
+ reg = <0x20>;
|
|
+ assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
|
|
+ assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
|
|
+ #clock-cells = <1>;
|
|
+ clocks = <&cru I2S1_MCLKOUT_TX>;
|
|
+ clock-names = "mclk";
|
|
+ clock-output-names = "rk809-clkout1", "rk809-clkout2";
|
|
+ interrupt-parent = <&gpio0>;
|
|
+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
|
|
+ #sound-dai-cells = <0>;
|
|
+ system-power-controller;
|
|
+ wakeup-source;
|
|
+
|
|
+ vcc1-supply = <&vcc3v3_sys>;
|
|
+ vcc2-supply = <&vcc3v3_sys>;
|
|
+ vcc3-supply = <&vcc3v3_sys>;
|
|
+ vcc4-supply = <&vcc3v3_sys>;
|
|
+ vcc5-supply = <&vcc3v3_sys>;
|
|
+ vcc6-supply = <&vcc3v3_sys>;
|
|
+ vcc7-supply = <&vcc3v3_sys>;
|
|
+ vcc8-supply = <&vcc3v3_sys>;
|
|
+ vcc9-supply = <&vcc3v3_sys>;
|
|
+
|
|
+ regulators {
|
|
+ vdd_logic: DCDC_REG1 {
|
|
+ regulator-name = "vdd_logic";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-initial-mode = <0x2>;
|
|
+ regulator-min-microvolt = <500000>;
|
|
+ regulator-max-microvolt = <1350000>;
|
|
+ regulator-ramp-delay = <6001>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_gpu: DCDC_REG2 {
|
|
+ regulator-name = "vdd_gpu";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-initial-mode = <0x2>;
|
|
+ regulator-min-microvolt = <500000>;
|
|
+ regulator-max-microvolt = <1350000>;
|
|
+ regulator-ramp-delay = <6001>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_ddr: DCDC_REG3 {
|
|
+ regulator-name = "vcc_ddr";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-initial-mode = <0x2>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_npu: DCDC_REG4 {
|
|
+ regulator-name = "vdd_npu";
|
|
+ regulator-initial-mode = <0x2>;
|
|
+ regulator-min-microvolt = <500000>;
|
|
+ regulator-max-microvolt = <1350000>;
|
|
+ regulator-ramp-delay = <6001>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_1v8: DCDC_REG5 {
|
|
+ regulator-name = "vcc_1v8";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdda0v9_image: LDO_REG1 {
|
|
+ regulator-name = "vdda0v9_image";
|
|
+ regulator-min-microvolt = <900000>;
|
|
+ regulator-max-microvolt = <900000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdda_0v9: LDO_REG2 {
|
|
+ regulator-name = "vdda_0v9";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <900000>;
|
|
+ regulator-max-microvolt = <900000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdda0v9_pmu: LDO_REG3 {
|
|
+ regulator-name = "vdda0v9_pmu";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <900000>;
|
|
+ regulator-max-microvolt = <900000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <900000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vccio_acodec: LDO_REG4 {
|
|
+ regulator-name = "vccio_acodec";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vccio_sd: LDO_REG5 {
|
|
+ regulator-name = "vccio_sd";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc3v3_pmu: LDO_REG6 {
|
|
+ regulator-name = "vcc3v3_pmu";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <3300000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca_1v8: LDO_REG7 {
|
|
+ regulator-name = "vcca_1v8";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca1v8_pmu: LDO_REG8 {
|
|
+ regulator-name = "vcca1v8_pmu";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca1v8_image: LDO_REG9 {
|
|
+ regulator-name = "vcca1v8_image";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_3v3: SWITCH_REG1 {
|
|
+ regulator-name = "vcc_3v3";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc3v3_sd: SWITCH_REG2 {
|
|
+ regulator-name = "vcc3v3_sd";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c5 {
|
|
+ status = "okay";
|
|
+
|
|
+ hym8563: rtc@51 {
|
|
+ compatible = "haoyu,hym8563";
|
|
+ reg = <0x51>;
|
|
+ interrupt-parent = <&gpio0>;
|
|
+ interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "rtcic_32kout";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&rtcic_int_l>;
|
|
+ wakeup-source;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2s0_8ch {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&i2s1_8ch {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s1m0_sclktx
|
|
+ &i2s1m0_lrcktx
|
|
+ &i2s1m0_sdi0
|
|
+ &i2s1m0_sdo0>;
|
|
+ rockchip,trcm-sync-tx-only;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&mdio0 {
|
|
+ rgmii_phy0: ethernet-phy@1 {
|
|
+ compatible = "ethernet-phy-ieee802.3-c22";
|
|
+ reg = <1>;
|
|
+ reset-assert-us = <20000>;
|
|
+ reset-deassert-us = <50000>;
|
|
+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&mdio1 {
|
|
+ rgmii_phy1: ethernet-phy@1 {
|
|
+ compatible = "ethernet-phy-ieee802.3-c22";
|
|
+ reg = <1>;
|
|
+ reset-assert-us = <20000>;
|
|
+ reset-deassert-us = <50000>;
|
|
+ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&pcie2x1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pcie20m1_pins>;
|
|
+ reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
|
|
+ vpcie3v3-supply = <&vcc3v3_sys2>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pcie30phy {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pcie3x2 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pcie30x2m1_pins>;
|
|
+ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+ bluetooth {
|
|
+ bt_reg_on_h: bt-reg-on-h {
|
|
+ rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ bt_wake_host_h: bt-wake-host-h {
|
|
+ rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ host_wake_bt_h: host-wake-bt-h {
|
|
+ rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ ir-receiver {
|
|
+ pwm3_ir: pwm3-ir {
|
|
+ rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ leds {
|
|
+ led: led {
|
|
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pcie {
|
|
+ pcie_pwren_h: pcie-pwren-h {
|
|
+ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pcie20 {
|
|
+ pcie20m1_pins: pcie20m1-pins {
|
|
+ rockchip,pins =
|
|
+ <2 RK_PD0 4 &pcfg_pull_none>,
|
|
+ <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>,
|
|
+ <2 RK_PD1 4 &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pcie30x2 {
|
|
+ pcie30x2m1_pins: pcie30x2m1-pins {
|
|
+ rockchip,pins =
|
|
+ <2 RK_PD4 4 &pcfg_pull_none>,
|
|
+ <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,
|
|
+ <2 RK_PD5 4 &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pmic {
|
|
+ pmic_int_l: pmic-int-l {
|
|
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rtc {
|
|
+ rtcic_int_l: rtcic-int-l {
|
|
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb {
|
|
+ usb_host_pwren_h: usb-host-pwren-h {
|
|
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ usb_otg_pwren_h: usb-otg-pwren-h {
|
|
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ wifi {
|
|
+ wifi_reg_on_h: wifi-reg-on-h {
|
|
+ rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ wifi_wake_host_h: wifi-wake-host-h {
|
|
+ rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&pmu_io_domains {
|
|
+ pmuio1-supply = <&vcc3v3_pmu>;
|
|
+ pmuio2-supply = <&vcc3v3_pmu>;
|
|
+ vccio1-supply = <&vccio_acodec>;
|
|
+ vccio2-supply = <&vcc_1v8>;
|
|
+ vccio3-supply = <&vccio_sd>;
|
|
+ vccio4-supply = <&vcc_1v8>;
|
|
+ vccio5-supply = <&vcc_3v3>;
|
|
+ vccio6-supply = <&vcc_1v8>;
|
|
+ vccio7-supply = <&vcc_3v3>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&saradc {
|
|
+ vref-supply = <&vcca_1v8>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdhci {
|
|
+ bus-width = <8>;
|
|
+ cap-mmc-highspeed;
|
|
+ max-frequency = <200000000>;
|
|
+ mmc-hs200-1_8v;
|
|
+ non-removable;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
|
|
+ vmmc-supply = <&vcc_3v3>;
|
|
+ vqmmc-supply = <&vcc_1v8>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdmmc0 {
|
|
+ bus-width = <4>;
|
|
+ cap-sd-highspeed;
|
|
+ disable-wp;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
|
+ vmmc-supply = <&vcc3v3_sd>;
|
|
+ vqmmc-supply = <&vccio_sd>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdmmc2 {
|
|
+ bus-width = <4>;
|
|
+ cap-sd-highspeed;
|
|
+ cap-sdio-irq;
|
|
+ keep-power-in-suspend;
|
|
+ mmc-pwrseq = <&sdio_pwrseq>;
|
|
+ non-removable;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_clk &sdmmc2m0_cmd>;
|
|
+ sd-uhs-sdr104;
|
|
+ vmmc-supply = <&vcc3v3_sys2>;
|
|
+ vqmmc-supply = <&vcc_1v8>;
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&sfc {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ flash@0 {
|
|
+ compatible = "jedec,spi-nor";
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <104000000>;
|
|
+ spi-rx-bus-width = <4>;
|
|
+ spi-tx-bus-width = <1>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&tsadc {
|
|
+ rockchip,hw-tshut-mode = <1>;
|
|
+ rockchip,hw-tshut-polarity = <0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart8 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn &uart8m0_rtsn>;
|
|
+ uart-has-rtscts;
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&usb_host0_ehci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host0_ohci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host0_xhci {
|
|
+ extcon = <&usb2phy0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host1_xhci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy0_host {
|
|
+ phy-supply = <&vcc5v0_usb_host>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy0_otg {
|
|
+ phy-supply = <&vcc5v0_usb_otg>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy1_otg {
|
|
+ phy-supply = <&vcc5v0_usb_host>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vop {
|
|
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
|
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vop_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vp0 {
|
|
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
|
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
|
|
+ remote-endpoint = <&hdmi_in_vp0>;
|
|
+ };
|
|
+};
|