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f02f6aaa8d
Currently, ipq807x only covers Qualcomm IPQ807x SoC-s. However, Qualcomm also has IPQ60xx and IPQ50xx SoC-s under the AX WiSoC-s and they share a lot of stuff with IPQ807x, especially IPQ60xx so to avoid duplicating kernel patches and everything lets make a common target with per SoC subtargets. Start doing that by renaming ipq807x to qualcommax so that dependencies on ipq807x target can be updated. Signed-off-by: Robert Marko <robimarko@gmail.com>
26 lines
1.0 KiB
Diff
26 lines
1.0 KiB
Diff
From 43d9788f546d24df22d8ba3fcc2497d7ccc198f3 Mon Sep 17 00:00:00 2001
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From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
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Date: Sat, 30 Jan 2021 10:50:11 +0530
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Subject: [PATCH] clk: qcom: Add WCSSAON reset
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Add WCSSAON reset required for Q6v5 on IPQ8074 SoC.
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Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
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Signed-off-by: Sricharan R <sricharan@codeaurora.org>
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Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
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Acked-by: Stephen Boyd <sboyd@kernel.org>
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---
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drivers/clk/qcom/gcc-ipq8074.c | 1 +
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1 file changed, 1 insertion(+)
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--- a/drivers/clk/qcom/gcc-ipq8074.c
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+++ b/drivers/clk/qcom/gcc-ipq8074.c
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@@ -4717,6 +4717,7 @@ static const struct qcom_reset_map gcc_i
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[GCC_NSSPORT4_RESET] = { .reg = 0x68014, .bitmask = BIT(27) | GENMASK(9, 8) },
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[GCC_NSSPORT5_RESET] = { .reg = 0x68014, .bitmask = BIT(28) | GENMASK(11, 10) },
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[GCC_NSSPORT6_RESET] = { .reg = 0x68014, .bitmask = BIT(29) | GENMASK(13, 12) },
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+ [GCC_WCSSAON_RESET] = { 0x59010, 0 },
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};
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static struct gdsc *gcc_ipq8074_gdscs[] = {
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