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f02f6aaa8d
Currently, ipq807x only covers Qualcomm IPQ807x SoC-s. However, Qualcomm also has IPQ60xx and IPQ50xx SoC-s under the AX WiSoC-s and they share a lot of stuff with IPQ807x, especially IPQ60xx so to avoid duplicating kernel patches and everything lets make a common target with per SoC subtargets. Start doing that by renaming ipq807x to qualcommax so that dependencies on ipq807x target can be updated. Signed-off-by: Robert Marko <robimarko@gmail.com>
104 lines
3.5 KiB
Diff
104 lines
3.5 KiB
Diff
From b422c9d4f048b086ce83f44a7cfcddcce162897f Mon Sep 17 00:00:00 2001
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From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
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Date: Sat, 30 Jan 2021 10:50:07 +0530
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Subject: [PATCH] remoteproc: qcom: Add support for split q6 + m3 wlan firmware
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IPQ8074 supports split firmware for q6 and m3 as well.
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So add support for loading the m3 firmware before q6.
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Now the drivers works fine for both split and unified
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firmwares.
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Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
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Signed-off-by: Sricharan R <sricharan@codeaurora.org>
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Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
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---
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drivers/remoteproc/qcom_q6v5_wcss.c | 33 +++++++++++++++++++++++++----
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1 file changed, 29 insertions(+), 4 deletions(-)
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--- a/drivers/remoteproc/qcom_q6v5_wcss.c
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+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
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@@ -139,6 +139,7 @@ struct q6v5_wcss {
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u32 version;
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bool requires_force_stop;
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bool need_mem_protection;
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+ const char *m3_firmware_name;
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struct qcom_rproc_glink glink_subdev;
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struct qcom_rproc_ssr ssr_subdev;
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@@ -147,7 +148,8 @@ struct q6v5_wcss {
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struct wcss_data {
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int (*init_clock)(struct q6v5_wcss *wcss);
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int (*init_regulator)(struct q6v5_wcss *wcss);
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- const char *firmware_name;
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+ const char *q6_firmware_name;
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+ const char *m3_firmware_name;
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unsigned int crash_reason_smem;
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u32 version;
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bool aon_reset_required;
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@@ -789,8 +791,29 @@ static void *q6v5_wcss_da_to_va(struct r
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static int q6v5_wcss_load(struct rproc *rproc, const struct firmware *fw)
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{
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struct q6v5_wcss *wcss = rproc->priv;
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+ const struct firmware *m3_fw;
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int ret;
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+ if (wcss->m3_firmware_name) {
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+ ret = request_firmware(&m3_fw, wcss->m3_firmware_name,
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+ wcss->dev);
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+ if (ret)
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+ goto skip_m3;
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+
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+ ret = qcom_mdt_load_no_init(wcss->dev, m3_fw,
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+ wcss->m3_firmware_name, 0,
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+ wcss->mem_region, wcss->mem_phys,
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+ wcss->mem_size, &wcss->mem_reloc);
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+
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+ release_firmware(m3_fw);
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+
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+ if (ret) {
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+ dev_err(wcss->dev, "can't load m3_fw.bXX\n");
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+ return ret;
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+ }
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+ }
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+
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+skip_m3:
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if (wcss->need_mem_protection)
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ret = qcom_mdt_load(wcss->dev, fw, rproc->firmware,
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WCNSS_PAS_ID, wcss->mem_region,
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@@ -1072,7 +1095,7 @@ static int q6v5_wcss_probe(struct platfo
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return -EPROBE_DEFER;
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rproc = rproc_alloc(&pdev->dev, pdev->name, desc->ops,
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- desc->firmware_name, sizeof(*wcss));
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+ desc->q6_firmware_name, sizeof(*wcss));
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if (!rproc) {
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dev_err(&pdev->dev, "failed to allocate rproc\n");
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return -ENOMEM;
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@@ -1085,6 +1108,7 @@ static int q6v5_wcss_probe(struct platfo
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wcss->version = desc->version;
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wcss->requires_force_stop = desc->requires_force_stop;
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wcss->need_mem_protection = desc->need_mem_protection;
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+ wcss->m3_firmware_name = desc->m3_firmware_name;
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ret = q6v5_wcss_init_mmio(wcss, pdev);
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if (ret)
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@@ -1150,7 +1174,8 @@ static int q6v5_wcss_remove(struct platf
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static const struct wcss_data wcss_ipq8074_res_init = {
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.init_clock = ipq8074_init_clock,
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- .firmware_name = "IPQ8074/q6_fw.mdt",
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+ .q6_firmware_name = "IPQ8074/q6_fw.mdt",
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+ .m3_firmware_name = "IPQ8074/m3_fw.mdt",
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.crash_reason_smem = WCSS_CRASH_REASON,
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.aon_reset_required = true,
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.wcss_q6_reset_required = true,
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@@ -1163,7 +1188,7 @@ static const struct wcss_data wcss_qcs40
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.init_clock = qcs404_init_clock,
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.init_regulator = qcs404_init_regulator,
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.crash_reason_smem = WCSS_CRASH_REASON,
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- .firmware_name = "wcnss.mdt",
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+ .q6_firmware_name = "wcnss.mdt",
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.version = WCSS_QCS404,
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.aon_reset_required = false,
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.wcss_q6_reset_required = false,
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