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Currently, ipq807x only covers Qualcomm IPQ807x SoC-s. However, Qualcomm also has IPQ60xx and IPQ50xx SoC-s under the AX WiSoC-s and they share a lot of stuff with IPQ807x, especially IPQ60xx so to avoid duplicating kernel patches and everything lets make a common target with per SoC subtargets. Start doing that by renaming ipq807x to qualcommax so that dependencies on ipq807x target can be updated. Signed-off-by: Robert Marko <robimarko@gmail.com>
31 lines
1.1 KiB
Diff
31 lines
1.1 KiB
Diff
From 8a576b5bc9f0555d1d970cacabcaa24a3b74fa57 Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Wed, 16 Nov 2022 22:15:01 +0100
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Subject: [PATCH] arm64: dts: qcom: ipq8074: pass QMP PCI PHY PIPE clocks to
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GCC
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Pass QMP PCI PHY PIPE clocks to the GCC controller so it does not have to
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find them by matching globaly by name.
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If not passed directly, driver maintains backwards compatibility by then
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falling back to global lookup.
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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---
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arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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@@ -396,8 +396,8 @@
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gcc: gcc@1800000 {
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compatible = "qcom,gcc-ipq8074";
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reg = <0x01800000 0x80000>;
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- clocks = <&xo>, <&sleep_clk>;
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- clock-names = "xo", "sleep_clk";
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+ clocks = <&xo>, <&sleep_clk>, <&pcie_phy0>, <&pcie_phy1>;
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+ clock-names = "xo", "sleep_clk", "pcie0_pipe", "pcie1_pipe";
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#clock-cells = <1>;
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#power-domain-cells = <1>;
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#reset-cells = <1>;
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