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20ea6adbf1
Build system: x86_64 Build-tested: bcm2708, bcm2709, bcm2710, bcm2711 Run-tested: bcm2708/RPiB+, bcm2709/RPi3B, bcm2710/RPi3B, bcm2711/RPi4B Signed-off-by: Marty Jones <mj8263788@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
88 lines
2.5 KiB
Diff
88 lines
2.5 KiB
Diff
From 60b7ddb0b3c9d906a20d8a84e527ccf5a792a64b Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Thu, 2 Dec 2021 17:04:18 +0100
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Subject: [PATCH] drm/vc4: hdmi: Move clock calculation into its own
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function
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The code to compute our clock rate for a given setup will be called in
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multiple places in the next patches, so let's create a separate function
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for it.
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_hdmi.c | 49 +++++++++++++++++++++++-----------
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1 file changed, 34 insertions(+), 15 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
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@@ -1263,6 +1263,35 @@ vc4_hdmi_encoder_clock_valid(const struc
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return MODE_OK;
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}
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+static unsigned long long
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+vc4_hdmi_encoder_compute_mode_clock(const struct drm_display_mode *mode,
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+ unsigned int bpc)
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+{
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+ unsigned long long clock = mode->crtc_clock * 1000;
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+
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+ if (mode->flags & DRM_MODE_FLAG_DBLCLK)
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+ clock = clock * 2;
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+
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+ return clock * bpc / 8;
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+}
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+
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+static int
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+vc4_hdmi_encoder_compute_clock(const struct vc4_hdmi *vc4_hdmi,
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+ struct vc4_hdmi_connector_state *vc4_state,
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+ const struct drm_display_mode *mode,
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+ unsigned int bpc)
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+{
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+ unsigned long long clock;
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+
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+ clock = vc4_hdmi_encoder_compute_mode_clock(mode, bpc);
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+ if (vc4_hdmi_encoder_clock_valid(vc4_hdmi, clock) != MODE_OK)
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+ return -EINVAL;
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+
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+ vc4_state->pixel_rate = clock;
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+
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+ return 0;
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+}
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+
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#define WIFI_2_4GHz_CH1_MIN_FREQ 2400000000ULL
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#define WIFI_2_4GHz_CH1_MAX_FREQ 2422000000ULL
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@@ -1275,6 +1304,7 @@ static int vc4_hdmi_encoder_atomic_check
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struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
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unsigned long long pixel_rate = mode->clock * 1000;
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unsigned long long tmds_rate;
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+ int ret;
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if (vc4_hdmi->variant->unsupported_odd_h_timings &&
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!(mode->flags & DRM_MODE_FLAG_DBLCLK) &&
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@@ -1296,21 +1326,10 @@ static int vc4_hdmi_encoder_atomic_check
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pixel_rate = mode->clock * 1000;
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}
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- if (conn_state->max_bpc == 12) {
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- pixel_rate = pixel_rate * 150;
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- do_div(pixel_rate, 100);
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- } else if (conn_state->max_bpc == 10) {
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- pixel_rate = pixel_rate * 125;
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- do_div(pixel_rate, 100);
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- }
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-
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- if (mode->flags & DRM_MODE_FLAG_DBLCLK)
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- pixel_rate = pixel_rate * 2;
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-
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- if (vc4_hdmi_encoder_clock_valid(vc4_hdmi, pixel_rate) != MODE_OK)
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- return -EINVAL;
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-
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- vc4_state->pixel_rate = pixel_rate;
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+ ret = vc4_hdmi_encoder_compute_clock(vc4_hdmi, vc4_state, mode,
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+ conn_state->max_bpc);
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+ if (ret)
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+ return ret;
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return 0;
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}
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