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openwrt/target/linux/bcm27xx/patches-5.15/950-0604-ARM-dts-Create-bcm2711-rpi-cm4s.dts-4761.patch
Álvaro Fernández Rojas 20ea6adbf1 bcm27xx: add support for linux v5.15 
Build system: x86_64
Build-tested: bcm2708, bcm2709, bcm2710, bcm2711
Run-tested: bcm2708/RPiB+, bcm2709/RPi3B, bcm2710/RPi3B, bcm2711/RPi4B

Signed-off-by: Marty Jones <mj8263788@gmail.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2022-05-17 15:11:22 +02:00

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From dc1156479b5bf177ecb403e11fe990af5db54394 Mon Sep 17 00:00:00 2001
From: peterharperuk <77111776+peterharperuk@users.noreply.github.com>
Date: Mon, 13 Dec 2021 14:00:35 +0000
Subject: [PATCH] ARM: dts: Create bcm2711-rpi-cm4s.dts (#4761)
Signed-off-by: Peter Harper <peter.harper@raspberrypi.com>
---
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/bcm2711-rpi-cm4s.dts | 398 +++++++++++++++++++++++++
2 files changed, 400 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/bcm2711-rpi-cm4s.dts
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -16,7 +16,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
bcm2711-rpi-4-b.dtb \
bcm2711-rpi-400.dtb \
bcm2710-rpi-cm3.dtb \
- bcm2711-rpi-cm4.dtb
+ bcm2711-rpi-cm4.dtb \
+ bcm2711-rpi-cm4s.dtb
dtb-$(CONFIG_ARCH_ALPINE) += \
alpine-db.dtb
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2711-rpi-cm4s.dts
@@ -0,0 +1,398 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+#include "bcm2711.dtsi"
+#include "bcm2711-rpi.dtsi"
+
+/ {
+ compatible = "raspberrypi,4-compute-module-s", "brcm,bcm2711";
+ model = "Raspberry Pi Compute Module 4S";
+
+ chosen {
+ /* 8250 auxiliary UART instead of pl011 */
+ stdout-path = "serial1:115200n8";
+ };
+
+ leds {
+ led-act {
+ gpios = <&virtgpio 0 0>;
+ };
+ };
+};
+
+&ddc0 {
+ status = "okay";
+};
+
+&gpio {
+ /*
+ * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
+ * the official GPU firmware DT blob.
+ *
+ * Legend:
+ * "FOO" = GPIO line named "FOO" on the schematic
+ * "FOO_N" = GPIO line named "FOO" on schematic, active low
+ */
+ gpio-line-names = "ID_SDA",
+ "ID_SCL",
+ "SDA1",
+ "SCL1",
+ "GPIO_GCLK",
+ "GPIO5",
+ "GPIO6",
+ "SPI_CE1_N",
+ "SPI_CE0_N",
+ "SPI_MISO",
+ "SPI_MOSI",
+ "SPI_SCLK",
+ "GPIO12",
+ "GPIO13",
+ /* Serial port */
+ "TXD1",
+ "RXD1",
+ "GPIO16",
+ "GPIO17",
+ "GPIO18",
+ "GPIO19",
+ "GPIO20",
+ "GPIO21",
+ "GPIO22",
+ "GPIO23",
+ "GPIO24",
+ "GPIO25",
+ "GPIO26",
+ "GPIO27",
+ "GPIO28",
+ "GPIO29",
+ "GPIO30",
+ "GPIO31",
+ "GPIO32",
+ "GPIO33",
+ "GPIO34",
+ "GPIO35",
+ "GPIO36",
+ "GPIO37",
+ "GPIO38",
+ "GPIO39",
+ "PWM0_MISO",
+ "PWM1_MOSI",
+ "GPIO42",
+ "GPIO43",
+ "GPIO44",
+ "GPIO45";
+};
+
+&hdmi0 {
+ status = "okay";
+};
+
+&pixelvalve0 {
+ status = "okay";
+};
+
+&pixelvalve1 {
+ status = "okay";
+};
+
+&pixelvalve2 {
+ status = "okay";
+};
+
+&pixelvalve4 {
+ status = "okay";
+};
+
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
+ status = "okay";
+};
+
+/* EMMC2 is used to drive the EMMC card */
+&emmc2 {
+ bus-width = <8>;
+ broken-cd;
+ status = "okay";
+};
+
+&pcie0 {
+ status = "disabled";
+};
+
+&vchiq {
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&vc4 {
+ status = "okay";
+};
+
+&vec {
+ status = "disabled";
+};
+
+// =============================================
+// Downstream rpi- changes
+
+#define BCM2711
+
+#include "bcm270x.dtsi"
+#include "bcm2711-rpi-ds.dtsi"
+
+/ {
+ soc {
+ /delete-node/ pixelvalve@7e807000;
+ /delete-node/ hdmi@7e902000;
+
+ virtgpio: virtgpio {
+ compatible = "brcm,bcm2835-virtgpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ firmware = <&firmware>;
+ status = "okay";
+ };
+ };
+};
+
+#include "bcm283x-rpi-csi0-2lane.dtsi"
+#include "bcm283x-rpi-csi1-4lane.dtsi"
+#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
+#include "bcm283x-rpi-cam1-regulator.dtsi"
+
+/ {
+ chosen {
+ bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
+ };
+
+ aliases {
+ serial0 = &uart0;
+ mmc0 = &emmc2;
+ mmc1 = &mmcnr;
+ mmc2 = &sdhost;
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
+ i2c6 = &i2c6;
+ spi3 = &spi3;
+ spi4 = &spi4;
+ spi5 = &spi5;
+ spi6 = &spi6;
+ /delete-property/ intc;
+ };
+
+ /delete-node/ wifi-pwrseq;
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+ status = "okay";
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
+
+ spidev0: spidev@0{
+ compatible = "spidev";
+ reg = <0>; /* CE0 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <125000000>;
+ };
+
+ spidev1: spidev@1{
+ compatible = "spidev";
+ reg = <1>; /* CE1 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <125000000>;
+ };
+};
+
+&gpio {
+ spi0_pins: spi0_pins {
+ brcm,pins = <9 10 11>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+
+ spi0_cs_pins: spi0_cs_pins {
+ brcm,pins = <8 7>;
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
+ };
+
+ spi3_pins: spi3_pins {
+ brcm,pins = <1 2 3>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+
+ spi3_cs_pins: spi3_cs_pins {
+ brcm,pins = <0 24>;
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
+ };
+
+ spi4_pins: spi4_pins {
+ brcm,pins = <5 6 7>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+
+ spi4_cs_pins: spi4_cs_pins {
+ brcm,pins = <4 25>;
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
+ };
+
+ spi5_pins: spi5_pins {
+ brcm,pins = <13 14 15>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+
+ spi5_cs_pins: spi5_cs_pins {
+ brcm,pins = <12 26>;
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
+ };
+
+ spi6_pins: spi6_pins {
+ brcm,pins = <19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+
+ spi6_cs_pins: spi6_cs_pins {
+ brcm,pins = <18 27>;
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
+ };
+
+ i2c0_pins: i2c0 {
+ brcm,pins = <0 1>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ brcm,pull = <BCM2835_PUD_UP>;
+ };
+
+ i2c1_pins: i2c1 {
+ brcm,pins = <2 3>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ brcm,pull = <BCM2835_PUD_UP>;
+ };
+
+ i2c3_pins: i2c3 {
+ brcm,pins = <4 5>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ brcm,pull = <BCM2835_PUD_UP>;
+ };
+
+ i2c4_pins: i2c4 {
+ brcm,pins = <8 9>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ brcm,pull = <BCM2835_PUD_UP>;
+ };
+
+ i2c5_pins: i2c5 {
+ brcm,pins = <12 13>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ brcm,pull = <BCM2835_PUD_UP>;
+ };
+
+ i2c6_pins: i2c6 {
+ brcm,pins = <22 23>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ brcm,pull = <BCM2835_PUD_UP>;
+ };
+
+ i2s_pins: i2s {
+ brcm,pins = <18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+
+ sdio_pins: sdio_pins {
+ brcm,pins = <34 35 36 37 38 39>;
+ brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
+ brcm,pull = <0 2 2 2 2 2>;
+ };
+
+ uart0_pins: uart0_pins {
+ brcm,pins;
+ brcm,function;
+ brcm,pull;
+ };
+
+ uart2_pins: uart2_pins {
+ brcm,pins = <0 1>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <0 2>;
+ };
+
+ uart3_pins: uart3_pins {
+ brcm,pins = <4 5>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <0 2>;
+ };
+
+ uart4_pins: uart4_pins {
+ brcm,pins = <8 9>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <0 2>;
+ };
+
+ uart5_pins: uart5_pins {
+ brcm,pins = <12 13>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ brcm,pull = <0 2>;
+ };
+};
+
+&i2c0if {
+ clock-frequency = <100000>;
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ clock-frequency = <100000>;
+};
+
+&i2s {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s_pins>;
+};
+
+// =============================================
+// Board specific stuff here
+
+&sdhost {
+ status = "disabled";
+};
+
+&gpio {
+ audio_pins: audio_pins {
+ brcm,pins = <>;
+ brcm,function = <>;
+ };
+};
+
+&leds {
+ act_led: led-act {
+ label = "led0";
+ linux,default-trigger = "mmc0";
+ };
+};
+
+&pwm1 {
+ status = "disabled";
+};
+
+&audio {
+ pinctrl-names = "default";
+ pinctrl-0 = <&audio_pins>;
+ brcm,disable-headphones = <1>;
+};
+
+/ {
+ __overrides__ {
+ act_led_gpio = <&act_led>,"gpios:4";
+ act_led_activelow = <&act_led>,"gpios:8";
+ act_led_trigger = <&act_led>,"linux,default-trigger";
+
+ sd_poll_once = <&emmc2>, "non-removable?";
+ spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
+ <&spi0>, "dmas:8=", <&dma40>;
+ };
+};
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