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https://www.kernel.org/pub/linux/kernel/v4.x/ChangeLog-4.1.11 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 47252
161 lines
4.6 KiB
Diff
161 lines
4.6 KiB
Diff
From 5cb31780791d0f6b68e3712f1b35f1a28c47add0 Mon Sep 17 00:00:00 2001
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From: Boris Brezillon <boris.brezillon@free-electrons.com>
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Date: Tue, 21 Oct 2014 14:37:15 +0200
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Subject: [PATCH] mtd: nand: sunxi: Add NAND partition support
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Add NAND partition support to the sunxi_nand driver.
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Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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drivers/mtd/nand/Kconfig | 1 +
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drivers/mtd/nand/sunxi_nand.c | 73 +++++++++++++++++++++++++++++++++++++------
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2 files changed, 65 insertions(+), 9 deletions(-)
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--- a/drivers/mtd/nand/Kconfig
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+++ b/drivers/mtd/nand/Kconfig
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@@ -525,6 +525,7 @@ config MTD_NAND_XWAY
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config MTD_NAND_SUNXI
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tristate "Support for NAND on Allwinner SoCs"
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depends on ARCH_SUNXI
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+ select MTD_OF_NAND_PARTS
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help
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Enables support for NAND Flash chips on Allwinner SoCs.
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--- a/drivers/mtd/nand/sunxi_nand.c
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+++ b/drivers/mtd/nand/sunxi_nand.c
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@@ -206,6 +206,23 @@ struct sunxi_nand_hw_ecc {
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};
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/*
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+ * sunxi NAND partition structure: stores NAND partitions information
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+ *
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+ * @part: base paritition structure
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+ * @ecc: per-partition ECC info
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+ */
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+struct sunxi_nand_part {
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+ struct nand_part part;
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+ struct nand_ecc_ctrl ecc;
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+};
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+
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+static inline struct sunxi_nand_part *
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+to_sunxi_nand_part(struct nand_part *part)
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+{
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+ return container_of(part, struct sunxi_nand_part, part);
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+}
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+
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+/*
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* NAND chip structure: stores NAND chip device related information
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*
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* @node: used to store NAND chips into a list
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@@ -525,7 +542,7 @@ static int sunxi_nfc_hw_ecc_read_page(st
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int oob_required, int page)
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{
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struct sunxi_nfc *nfc = to_sunxi_nfc(chip->controller);
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- struct nand_ecc_ctrl *ecc = &chip->ecc;
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+ struct nand_ecc_ctrl *ecc = chip->cur_ecc;
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struct nand_ecclayout *layout = ecc->layout;
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struct sunxi_nand_hw_ecc *data = ecc->priv;
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unsigned int max_bitflips = 0;
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@@ -611,7 +628,7 @@ static int sunxi_nfc_hw_ecc_write_page(s
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const uint8_t *buf, int oob_required)
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{
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struct sunxi_nfc *nfc = to_sunxi_nfc(chip->controller);
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- struct nand_ecc_ctrl *ecc = &chip->ecc;
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+ struct nand_ecc_ctrl *ecc = chip->cur_ecc;
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struct nand_ecclayout *layout = ecc->layout;
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struct sunxi_nand_hw_ecc *data = ecc->priv;
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int offset;
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@@ -679,7 +696,7 @@ static int sunxi_nfc_hw_syndrome_ecc_rea
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int page)
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{
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struct sunxi_nfc *nfc = to_sunxi_nfc(chip->controller);
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- struct nand_ecc_ctrl *ecc = &chip->ecc;
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+ struct nand_ecc_ctrl *ecc = chip->cur_ecc;
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struct sunxi_nand_hw_ecc *data = ecc->priv;
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unsigned int max_bitflips = 0;
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uint8_t *oob = chip->oob_poi;
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@@ -747,7 +764,7 @@ static int sunxi_nfc_hw_syndrome_ecc_wri
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int oob_required)
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{
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struct sunxi_nfc *nfc = to_sunxi_nfc(chip->controller);
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- struct nand_ecc_ctrl *ecc = &chip->ecc;
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+ struct nand_ecc_ctrl *ecc = chip->cur_ecc;
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struct sunxi_nand_hw_ecc *data = ecc->priv;
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uint8_t *oob = chip->oob_poi;
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int offset = 0;
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@@ -1091,8 +1108,13 @@ static int sunxi_nand_ecc_init(struct mt
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ecc->strength = nand->ecc_strength_ds;
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}
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- if (!ecc->size || !ecc->strength)
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- return -EINVAL;
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+ if (!ecc->size || !ecc->strength) {
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+ if (ecc == &nand->ecc)
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+ return -EINVAL;
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+
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+ ecc->size = nand->ecc.size;
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+ ecc->strength = nand->ecc.strength;
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+ }
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ecc->mode = NAND_ECC_HW;
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@@ -1127,12 +1149,39 @@ static int sunxi_nand_ecc_init(struct mt
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return 0;
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}
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+static void sunxi_nand_part_release(struct nand_part *part)
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+{
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+ kfree(to_sunxi_nand_part(part));
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+}
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+
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+struct nand_part *sunxi_ofnandpart_parse(void *priv, struct mtd_info *master,
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+ struct device_node *pp)
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+{
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+ struct sunxi_nand_part *part;
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+ int ret;
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+
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+ part = kzalloc(sizeof(*part), GFP_KERNEL);
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+ part->part.release = sunxi_nand_part_release;
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+
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+ ret = sunxi_nand_ecc_init(master, &part->ecc, pp);
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+ if (ret)
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+ goto err;
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+
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+ part->part.ecc = &part->ecc;
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+
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+ return &part->part;
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+
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+err:
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+ kfree(part);
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+ return ERR_PTR(ret);
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+}
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+
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static int sunxi_nand_chip_init(struct device *dev, struct sunxi_nfc *nfc,
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struct device_node *np)
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{
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const struct nand_sdr_timings *timings;
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struct sunxi_nand_chip *chip;
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- struct mtd_part_parser_data ppdata;
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+ struct ofnandpart_data ppdata;
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struct mtd_info *mtd;
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struct nand_chip *nand;
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int nsels;
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@@ -1261,8 +1310,14 @@ static int sunxi_nand_chip_init(struct d
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return ret;
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}
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- ppdata.of_node = np;
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- ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
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+ ppdata.node = np;
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+ ppdata.parse = sunxi_ofnandpart_parse;
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+ ret = ofnandpart_parse(mtd, &ppdata);
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+ if (!ret)
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+ ret = mtd_device_register(mtd, NULL, 0);
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+ else if (ret > 0)
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+ ret = 0;
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+
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if (ret) {
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dev_err(dev, "failed to register mtd device: %d\n", ret);
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nand_release(mtd);
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