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git://git.openwrt.org/openwrt/openwrt.git
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e1bfcceb93
SVN-Revision: 22463
198 lines
4.4 KiB
Diff
198 lines
4.4 KiB
Diff
From 5cd5a44b94b451ecaf593bb49919cfbb51ccb622 Mon Sep 17 00:00:00 2001
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From: Lars-Peter Clausen <lars@metafoo.de>
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Date: Sat, 17 Jul 2010 11:12:20 +0000
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Subject: [PATCH] MIPS: JZ4740: Add PWM support
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Add support for the PWM part of the timer unit on a JZ4740 SoC.
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Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
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Cc: linux-mips@linux-mips.org
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Cc: linux-kernel@vger.kernel.org
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Patchwork: https://patchwork.linux-mips.org/patch/1468/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/jz4740/pwm.c | 177 ++++++++++++++++++++++++++++++++++++++++++++++++
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1 files changed, 177 insertions(+), 0 deletions(-)
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create mode 100644 arch/mips/jz4740/pwm.c
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--- /dev/null
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+++ b/arch/mips/jz4740/pwm.c
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@@ -0,0 +1,177 @@
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+/*
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+ * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
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+ * JZ4740 platform PWM support
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License as published by the
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+ * Free Software Foundation; either version 2 of the License, or (at your
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+ * option) any later version.
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+ *
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+ * You should have received a copy of the GNU General Public License along
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+ * with this program; if not, write to the Free Software Foundation, Inc.,
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+ * 675 Mass Ave, Cambridge, MA 02139, USA.
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+ *
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+ */
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+
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+#include <linux/kernel.h>
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+
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+#include <linux/clk.h>
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+#include <linux/err.h>
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+#include <linux/pwm.h>
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+#include <linux/gpio.h>
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+
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+#include <asm/mach-jz4740/gpio.h>
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+#include "timer.h"
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+
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+static struct clk *jz4740_pwm_clk;
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+
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+DEFINE_MUTEX(jz4740_pwm_mutex);
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+
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+struct pwm_device {
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+ unsigned int id;
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+ unsigned int gpio;
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+ bool used;
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+};
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+
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+static struct pwm_device jz4740_pwm_list[] = {
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+ { 2, JZ_GPIO_PWM2, false },
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+ { 3, JZ_GPIO_PWM3, false },
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+ { 4, JZ_GPIO_PWM4, false },
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+ { 5, JZ_GPIO_PWM5, false },
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+ { 6, JZ_GPIO_PWM6, false },
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+ { 7, JZ_GPIO_PWM7, false },
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+};
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+
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+struct pwm_device *pwm_request(int id, const char *label)
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+{
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+ int ret = 0;
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+ struct pwm_device *pwm;
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+
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+ if (id < 2 || id > 7 || !jz4740_pwm_clk)
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+ return ERR_PTR(-ENODEV);
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+
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+ mutex_lock(&jz4740_pwm_mutex);
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+
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+ pwm = &jz4740_pwm_list[id - 2];
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+ if (pwm->used)
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+ ret = -EBUSY;
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+ else
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+ pwm->used = true;
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+
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+ mutex_unlock(&jz4740_pwm_mutex);
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+
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+ if (ret)
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+ return ERR_PTR(ret);
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+
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+ ret = gpio_request(pwm->gpio, label);
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+
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+ if (ret) {
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+ printk(KERN_ERR "Failed to request pwm gpio: %d\n", ret);
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+ pwm->used = false;
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+ return ERR_PTR(ret);
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+ }
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+
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+ jz_gpio_set_function(pwm->gpio, JZ_GPIO_FUNC_PWM);
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+
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+ jz4740_timer_start(id);
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+
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+ return pwm;
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+}
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+
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+void pwm_free(struct pwm_device *pwm)
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+{
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+ pwm_disable(pwm);
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+ jz4740_timer_set_ctrl(pwm->id, 0);
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+
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+ jz_gpio_set_function(pwm->gpio, JZ_GPIO_FUNC_NONE);
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+ gpio_free(pwm->gpio);
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+
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+ jz4740_timer_stop(pwm->id);
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+
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+ pwm->used = false;
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+}
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+
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+int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
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+{
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+ unsigned long long tmp;
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+ unsigned long period, duty;
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+ unsigned int prescaler = 0;
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+ unsigned int id = pwm->id;
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+ uint16_t ctrl;
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+ bool is_enabled;
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+
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+ if (duty_ns < 0 || duty_ns > period_ns)
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+ return -EINVAL;
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+
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+ tmp = (unsigned long long)clk_get_rate(jz4740_pwm_clk) * period_ns;
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+ do_div(tmp, 1000000000);
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+ period = tmp;
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+
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+ while (period > 0xffff && prescaler < 6) {
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+ period >>= 2;
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+ ++prescaler;
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+ }
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+
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+ if (prescaler == 6)
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+ return -EINVAL;
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+
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+ tmp = (unsigned long long)period * duty_ns;
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+ do_div(tmp, period_ns);
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+ duty = period - tmp;
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+
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+ if (duty >= period)
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+ duty = period - 1;
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+
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+ is_enabled = jz4740_timer_is_enabled(id);
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+ if (is_enabled)
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+ pwm_disable(pwm);
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+
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+ jz4740_timer_set_count(id, 0);
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+ jz4740_timer_set_duty(id, duty);
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+ jz4740_timer_set_period(id, period);
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+
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+ ctrl = JZ_TIMER_CTRL_PRESCALER(prescaler) | JZ_TIMER_CTRL_SRC_EXT |
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+ JZ_TIMER_CTRL_PWM_ABBRUPT_SHUTDOWN;
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+
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+ jz4740_timer_set_ctrl(id, ctrl);
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+
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+ if (is_enabled)
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+ pwm_enable(pwm);
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+
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+ return 0;
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+}
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+
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+int pwm_enable(struct pwm_device *pwm)
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+{
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+ uint32_t ctrl = jz4740_timer_get_ctrl(pwm->id);
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+
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+ ctrl |= JZ_TIMER_CTRL_PWM_ENABLE;
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+ jz4740_timer_set_ctrl(pwm->id, ctrl);
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+ jz4740_timer_enable(pwm->id);
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+
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+ return 0;
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+}
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+
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+void pwm_disable(struct pwm_device *pwm)
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+{
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+ uint32_t ctrl = jz4740_timer_get_ctrl(pwm->id);
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+
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+ ctrl &= ~JZ_TIMER_CTRL_PWM_ENABLE;
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+ jz4740_timer_disable(pwm->id);
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+ jz4740_timer_set_ctrl(pwm->id, ctrl);
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+}
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+
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+static int __init jz4740_pwm_init(void)
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+{
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+ int ret = 0;
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+
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+ jz4740_pwm_clk = clk_get(NULL, "ext");
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+
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+ if (IS_ERR(jz4740_pwm_clk)) {
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+ ret = PTR_ERR(jz4740_pwm_clk);
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+ jz4740_pwm_clk = NULL;
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+ }
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+
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+ return ret;
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+}
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+subsys_initcall(jz4740_pwm_init);
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