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307e5cfc6e
The D-Link DGS device tree was reorganized to better reflect the common DT parts. The common include is named SOC specific (838X) and it seemed like a good choice to add another common include in the future for the RTL839X devices. From the current point of view this option is not really needed. 1. The common part only includes data that matches RTL839X devices too. 2. The Panasonic DT structure avoids including the basic DTSI inside the common DTSI. Taking simplicity of the Panasonic include logic and in perparation to provide DGS-1210-52 support it makes sense to harmonize this. - rename common include to reflect its content - move the link to the root DTSI directly to the device specific DTS Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
89 lines
1.5 KiB
Plaintext
89 lines
1.5 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "rtl838x.dtsi"
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#include "rtl83xx_d-link_dgs-1210_common.dtsi"
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#include "rtl83xx_d-link_dgs-1210_gpio.dtsi"
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/ {
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compatible = "d-link,dgs-1210-10mp-f", "realtek,rtl8382-soc", "realtek,rtl838x-soc";
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model = "D-Link DGS-1210-10MP F";
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};
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&leds {
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link_act {
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label = "green:link_act";
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gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
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};
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poe {
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label = "green:poe";
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gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
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};
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poe_max {
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label = "yellow:poe_max";
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gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
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};
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};
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&keys {
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mode {
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label = "mode";
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gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_LIGHTS_TOGGLE>;
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};
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};
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&uart1 {
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status = "okay";
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};
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ðernet0 {
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mdio: mdio-bus {
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compatible = "realtek,rtl838x-mdio";
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regmap = <ðernet0>;
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#address-cells = <1>;
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#size-cells = <0>;
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INTERNAL_PHY(8)
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INTERNAL_PHY(9)
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INTERNAL_PHY(10)
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INTERNAL_PHY(11)
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INTERNAL_PHY(12)
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INTERNAL_PHY(13)
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INTERNAL_PHY(14)
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INTERNAL_PHY(15)
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INTERNAL_PHY(24)
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INTERNAL_PHY(26)
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};
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};
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&switch0 {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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SWITCH_PORT(8, 1, internal)
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SWITCH_PORT(9, 2, internal)
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SWITCH_PORT(10, 3, internal)
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SWITCH_PORT(11, 4, internal)
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SWITCH_PORT(12, 5, internal)
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SWITCH_PORT(13, 6, internal)
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SWITCH_PORT(14, 7, internal)
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SWITCH_PORT(15, 8, internal)
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SWITCH_SFP_PORT(24, 9, rgmii-id)
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SWITCH_SFP_PORT(26, 10, rgmii-id)
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port@28 {
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ethernet = <ðernet0>;
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reg = <28>;
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phy-mode = "internal";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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