100 lines
3.1 KiB
Diff
100 lines
3.1 KiB
Diff
From 40e5ddf4f84869815129551f4a8cfc2c223ebeae Mon Sep 17 00:00:00 2001
|
|
From: Stephen Boyd <sboyd@codeaurora.org>
|
|
Date: Tue, 14 Aug 2018 17:42:28 +0530
|
|
Subject: [PATCH 09/12] dt-bindings: arm: Document qcom,kpss-gcc
|
|
|
|
The ACC and GCC regions present in KPSSv1 contain registers to
|
|
control clocks and power to each Krait CPU and L2. Documenting
|
|
the bindings here.
|
|
|
|
Reviewed-by: Rob Herring <robh@kernel.org>
|
|
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
|
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
|
|
Tested-by: Craig Tatlor <ctatlor97@gmail.com>
|
|
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
|
---
|
|
.../bindings/arm/msm/qcom,kpss-acc.txt | 19 ++++++++
|
|
.../bindings/arm/msm/qcom,kpss-gcc.txt | 44 +++++++++++++++++++
|
|
2 files changed, 63 insertions(+)
|
|
create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt
|
|
|
|
--- a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
|
|
+++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
|
|
@@ -21,10 +21,29 @@ PROPERTIES
|
|
the register region. An optional second element specifies
|
|
the base address and size of the alias register region.
|
|
|
|
+- clocks:
|
|
+ Usage: required
|
|
+ Value type: <prop-encoded-array>
|
|
+ Definition: reference to the pll parents.
|
|
+
|
|
+- clock-names:
|
|
+ Usage: required
|
|
+ Value type: <stringlist>
|
|
+ Definition: must be "pll8_vote", "pxo".
|
|
+
|
|
+- clock-output-names:
|
|
+ Usage: optional
|
|
+ Value type: <string>
|
|
+ Definition: Name of the output clock. Typically acpuX_aux where X is a
|
|
+ CPU number starting at 0.
|
|
+
|
|
Example:
|
|
|
|
clock-controller@2088000 {
|
|
compatible = "qcom,kpss-acc-v2";
|
|
reg = <0x02088000 0x1000>,
|
|
<0x02008000 0x1000>;
|
|
+ clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>;
|
|
+ clock-names = "pll8_vote", "pxo";
|
|
+ clock-output-names = "acpu0_aux";
|
|
};
|
|
--- /dev/null
|
|
+++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt
|
|
@@ -0,0 +1,44 @@
|
|
+Krait Processor Sub-system (KPSS) Global Clock Controller (GCC)
|
|
+
|
|
+PROPERTIES
|
|
+
|
|
+- compatible:
|
|
+ Usage: required
|
|
+ Value type: <string>
|
|
+ Definition: should be one of the following. The generic compatible
|
|
+ "qcom,kpss-gcc" should also be included.
|
|
+ "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc"
|
|
+ "qcom,kpss-gcc-apq8064", "qcom,kpss-gcc"
|
|
+ "qcom,kpss-gcc-msm8974", "qcom,kpss-gcc"
|
|
+ "qcom,kpss-gcc-msm8960", "qcom,kpss-gcc"
|
|
+
|
|
+- reg:
|
|
+ Usage: required
|
|
+ Value type: <prop-encoded-array>
|
|
+ Definition: base address and size of the register region
|
|
+
|
|
+- clocks:
|
|
+ Usage: required
|
|
+ Value type: <prop-encoded-array>
|
|
+ Definition: reference to the pll parents.
|
|
+
|
|
+- clock-names:
|
|
+ Usage: required
|
|
+ Value type: <stringlist>
|
|
+ Definition: must be "pll8_vote", "pxo".
|
|
+
|
|
+- clock-output-names:
|
|
+ Usage: required
|
|
+ Value type: <string>
|
|
+ Definition: Name of the output clock. Typically acpu_l2_aux indicating
|
|
+ an L2 cache auxiliary clock.
|
|
+
|
|
+Example:
|
|
+
|
|
+ l2cc: clock-controller@2011000 {
|
|
+ compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc";
|
|
+ reg = <0x2011000 0x1000>;
|
|
+ clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>;
|
|
+ clock-names = "pll8_vote", "pxo";
|
|
+ clock-output-names = "acpu_l2_aux";
|
|
+ };
|