602 lines
12 KiB
Plaintext
602 lines
12 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/dts-v1/;
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#include <dt-bindings/clock/bcm6362-clock.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/bcm6362-interrupt-controller.h>
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#include <dt-bindings/reset/bcm6362-reset.h>
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#include <dt-bindings/soc/bcm6362-pm.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "brcm,bcm6362";
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aliases {
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nflash = &nflash;
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pinctrl = &pinctrl;
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serial0 = &uart0;
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serial1 = &uart1;
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spi0 = &lsspi;
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spi1 = &hsspi;
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};
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chosen {
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bootargs = "earlycon";
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stdout-path = "serial0:115200n8";
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};
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clocks {
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periph_osc: periph-osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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clock-output-names = "periph";
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};
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hsspi_osc: hsspi-osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <400000000>;
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clock-output-names = "hsspi_osc";
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};
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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mips-hpt-frequency = <200000000>;
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cpu@0 {
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compatible = "brcm,bmips4350", "mips,mips4Kc";
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device_type = "cpu";
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reg = <0>;
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};
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cpu@1 {
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compatible = "brcm,bmips4350", "mips,mips4Kc";
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device_type = "cpu";
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reg = <1>;
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};
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};
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cpu_intc: interrupt-controller {
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#address-cells = <0>;
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compatible = "mti,cpu-interrupt-controller";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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memory@0 {
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device_type = "memory";
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reg = <0 0>;
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};
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ubus {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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periph_clk: clock-controller@10000004 {
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compatible = "brcm,bcm6362-clocks";
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reg = <0x10000004 0x4>;
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#clock-cells = <1>;
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};
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pll_cntl: syscon@10000008 {
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compatible = "syscon", "simple-mfd";
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reg = <0x10000008 0x4>;
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native-endian;
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syscon-reboot {
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compatible = "syscon-reboot";
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offset = <0x0>;
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mask = <0x1>;
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};
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};
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periph_rst: reset-controller@10000010 {
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compatible = "brcm,bcm6345-reset";
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reg = <0x10000010 0x4>;
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#reset-cells = <1>;
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};
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ext_intc: interrupt-controller@10000018 {
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#address-cells = <1>;
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compatible = "brcm,bcm6345-ext-intc";
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reg = <0x10000018 0x4>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <BCM6362_IRQ_EXT0>,
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<BCM6362_IRQ_EXT1>,
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<BCM6362_IRQ_EXT2>,
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<BCM6362_IRQ_EXT3>;
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};
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periph_intc: interrupt-controller@10000020 {
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#address-cells = <1>;
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compatible = "brcm,bcm6345-l1-intc";
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reg = <0x10000020 0x10>,
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<0x10000030 0x10>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpu_intc>;
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interrupts = <2>, <3>;
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};
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wdt: watchdog@1000005c {
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compatible = "brcm,bcm7038-wdt";
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reg = <0x1000005c 0xc>;
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clocks = <&periph_osc>;
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timeout-sec = <30>;
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};
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gpio_cntl: syscon@10000080 {
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compatible = "brcm,bcm6362-gpio-sysctl",
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"syscon", "simple-mfd";
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reg = <0x10000080 0x80>;
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ranges = <0 0x10000080 0x80>;
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native-endian;
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gpio: gpio@0 {
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compatible = "brcm,bcm6362-gpio";
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reg-names = "dirout", "dat";
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reg = <0x0 0x8>, <0x8 0x8>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 0 48>;
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#gpio-cells = <2>;
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};
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pinctrl: pinctrl@18 {
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compatible = "brcm,bcm6362-pinctrl";
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reg = <0x18 0x10>, <0x38 0x4>;
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pinctrl_usb_device_led: usb_device_led-pins {
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function = "usb_device_led";
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pins = "gpio0";
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};
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pinctrl_sys_irq: sys_irq-pins {
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function = "sys_irq";
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pins = "gpio1";
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};
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pinctrl_serial_led: serial_led-pins {
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pinctrl_serial_led_clk: serial_led_clk-pins {
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function = "serial_led_clk";
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pins = "gpio2";
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};
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pinctrl_serial_led_data: serial_led_data-pins {
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function = "serial_led_data";
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pins = "gpio3";
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};
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};
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pinctrl_robosw_led_data: robosw_led_data-pins {
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function = "robosw_led_data";
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pins = "gpio4";
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};
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pinctrl_robosw_led_clk: robosw_led_clk-pins {
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function = "robosw_led_clk";
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pins = "gpio5";
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};
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pinctrl_robosw_led0: robosw_led0-pins {
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function = "robosw_led0";
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pins = "gpio6";
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};
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pinctrl_robosw_led1: robosw_led1-pins {
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function = "robosw_led1";
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pins = "gpio7";
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};
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pinctrl_inet_led: inet_led-pins {
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function = "inet_led";
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pins = "gpio8";
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};
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pinctrl_spi_cs2: spi_cs2-pins {
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function = "spi_cs2";
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pins = "gpio9";
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};
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pinctrl_spi_cs3: spi_cs3-pins {
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function = "spi_cs3";
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pins = "gpio10";
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};
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pinctrl_ntr_pulse: ntr_pulse-pins {
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function = "ntr_pulse";
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pins = "gpio11";
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};
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pinctrl_uart1_scts: uart1_scts-pins {
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function = "uart1_scts";
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pins = "gpio12";
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};
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pinctrl_uart1_srts: uart1_srts-pins {
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function = "uart1_srts";
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pins = "gpio13";
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};
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pinctrl_uart1: uart1-pins {
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pinctrl_uart1_sdin: uart1_sdin-pins {
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function = "uart1_sdin";
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pins = "gpio14";
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};
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pinctrl_uart1_sdout: uart1_sdout-pins {
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function = "uart1_sdout";
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pins = "gpio15";
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};
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};
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pinctrl_adsl_spi: adsl_spi-pins {
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pinctrl_adsl_spi_miso: adsl_spi_miso-pins {
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function = "adsl_spi_miso";
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pins = "gpio16";
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};
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pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins {
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function = "adsl_spi_mosi";
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pins = "gpio17";
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};
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pinctrl_adsl_spi_clk: adsl_spi_clk-pins {
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function = "adsl_spi_clk";
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pins = "gpio18";
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};
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pinctrl_adsl_spi_cs: adsl_spi_cs-pins {
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function = "adsl_spi_cs";
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pins = "gpio19";
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};
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};
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pinctrl_ephy0_led: ephy0_led-pins {
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function = "ephy0_led";
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pins = "gpio20";
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};
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pinctrl_ephy1_led: ephy1_led-pins {
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function = "ephy1_led";
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pins = "gpio21";
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};
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pinctrl_ephy2_led: ephy2_led-pins {
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function = "ephy2_led";
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pins = "gpio22";
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};
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pinctrl_ephy3_led: ephy3_led-pins {
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function = "ephy3_led";
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pins = "gpio23";
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};
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pinctrl_ext_irq0: ext_irq0-pins {
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function = "ext_irq0";
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pins = "gpio24";
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};
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pinctrl_ext_irq1: ext_irq1-pins {
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function = "ext_irq1";
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pins = "gpio25";
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};
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pinctrl_ext_irq2: ext_irq2-pins {
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function = "ext_irq2";
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pins = "gpio26";
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};
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pinctrl_ext_irq3: ext_irq3-pins {
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function = "ext_irq3";
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pins = "gpio27";
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};
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pinctrl_nand: nand-pins {
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function = "nand";
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group = "nand_grp";
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};
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};
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};
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uart0: serial@10000100 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x10000100 0x18>;
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interrupt-parent = <&periph_intc>;
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interrupts = <BCM6362_IRQ_UART0>;
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clocks = <&periph_osc>;
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clock-names = "periph";
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status = "disabled";
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};
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uart1: serial@10000120 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x10000120 0x18>;
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interrupt-parent = <&periph_intc>;
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interrupts = <BCM6362_IRQ_UART1>;
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clocks = <&periph_osc>;
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clock-names = "periph";
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status = "disabled";
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};
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nflash: nand@10000200 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,nand-bcm6368",
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"brcm,brcmnand-v2.2",
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"brcm,brcmnand";
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reg = <0x10000200 0x180>,
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<0x10000600 0x200>,
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<0x10000070 0x10>;
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reg-names = "nand",
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"nand-cache",
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"nand-int-base";
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interrupt-parent = <&periph_intc>;
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interrupts = <BCM6362_IRQ_NAND>;
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clocks = <&periph_clk BCM6362_CLK_NAND>;
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clock-names = "nand";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nand>;
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status = "disabled";
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};
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lsspi: spi@10000800 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,bcm6358-spi";
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reg = <0x10000800 0x70c>;
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interrupt-parent = <&periph_intc>;
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interrupts = <BCM6362_IRQ_LSSPI>;
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clocks = <&periph_clk BCM6362_CLK_SPI>;
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clock-names = "spi";
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resets = <&periph_rst BCM6362_RST_SPI>;
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status = "disabled";
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};
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hsspi: spi@10001000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,bcm6328-hsspi";
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reg = <0x10001000 0x600>;
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interrupt-parent = <&periph_intc>;
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interrupts = <BCM6362_IRQ_HSSPI>;
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clocks = <&periph_clk BCM6362_CLK_HSSPI>,
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<&hsspi_osc>;
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clock-names = "hsspi",
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"pll";
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resets = <&periph_rst BCM6362_RST_SPI>;
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status = "disabled";
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};
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serdes_cntl: syscon@10001804 {
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compatible = "syscon";
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reg = <0x10001804 0x4>;
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native-endian;
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};
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periph_pwr: power-controller@10001848 {
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compatible = "brcm,bcm6362-power-controller";
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reg = <0x10001848 0x4>;
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#power-domain-cells = <1>;
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};
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leds: led-controller@10001900 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,bcm6328-leds";
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reg = <0x10001900 0x24>;
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status = "disabled";
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};
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ehci: usb@10002500 {
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compatible = "brcm,bcm6362-ehci", "generic-ehci";
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reg = <0x10002500 0x100>;
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big-endian;
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spurious-oc;
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interrupt-parent = <&periph_intc>;
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interrupts = <BCM6362_IRQ_EHCI>;
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phys = <&usbh 0>;
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phy-names = "usb";
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status = "disabled";
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};
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ohci: usb@10002600 {
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compatible = "brcm,bcm6362-ohci", "generic-ohci";
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reg = <0x10002600 0x100>;
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big-endian;
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no-big-frame-no;
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interrupt-parent = <&periph_intc>;
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interrupts = <BCM6362_IRQ_OHCI>;
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phys = <&usbh 0>;
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phy-names = "usb";
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status = "disabled";
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};
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usbh: usb-phy@10002700 {
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compatible = "brcm,bcm6362-usbh-phy";
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reg = <0x10002700 0x38>;
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#phy-cells = <1>;
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clocks = <&periph_clk BCM6362_CLK_USBH>;
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clock-names = "usbh";
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power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_USBH>;
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resets = <&periph_rst BCM6362_RST_USBH>;
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status = "disabled";
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};
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ethernet: ethernet@1000d800 {
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compatible = "brcm,bcm6362-enetsw";
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reg = <0x1000d800 0x80>,
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<0x1000da00 0x80>,
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<0x1000dc00 0x80>;
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reg-names = "dma",
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"dma-channels",
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"dma-sram";
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interrupt-parent = <&periph_intc>;
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interrupts = <BCM6362_IRQ_ENETSW_RX_DMA0>;
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interrupt-names = "rx";
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clocks = <&periph_clk BCM6362_CLK_SWPKT_USB>,
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<&periph_clk BCM6362_CLK_SWPKT_SAR>,
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<&periph_clk BCM6362_CLK_ROBOSW>;
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resets = <&periph_rst BCM6362_RST_ENETSW>,
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<&periph_rst BCM6362_RST_EPHY>;
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power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_ROBOSW>,
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<&periph_pwr BCM6362_POWER_DOMAIN_GMII_PADS>;
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dma-rx = <0>;
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dma-tx = <1>;
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status = "disabled";
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};
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switch0: switch@10e00000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,bcm6328-switch";
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reg = <0x10e00000 0x8000>;
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big-endian;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@8 {
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reg = <8>;
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label = "cpu";
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phy-mode = "internal";
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ethernet = <ðernet>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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mdio: mdio@10e000b0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,bcm6368-mdio-mux";
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reg = <0x10e000b0 0x8>;
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mdio_int: mdio@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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phy1: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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};
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phy2: ethernet-phy@2 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <2>;
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};
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phy3: ethernet-phy@3 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <3>;
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};
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phy4: ethernet-phy@4 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <4>;
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};
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};
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mdio_ext: mdio@1 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <1>;
|
|
};
|
|
};
|
|
|
|
pcie: pcie@10e40000 {
|
|
compatible = "brcm,bcm6328-pcie";
|
|
reg = <0x10e40000 0x10000>;
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
|
|
device_type = "pci";
|
|
bus-range = <0x00 0x01>;
|
|
ranges = <0x2000000 0 0x10f00000 0x10f00000 0 0x100000>;
|
|
linux,pci-probe-only = <1>;
|
|
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <BCM6362_IRQ_PCIE_RC>;
|
|
|
|
clocks = <&periph_clk BCM6362_CLK_PCIE>;
|
|
clock-names = "pcie";
|
|
|
|
resets = <&periph_rst BCM6362_RST_PCIE>,
|
|
<&periph_rst BCM6362_RST_PCIE_EXT>,
|
|
<&periph_rst BCM6362_RST_PCIE_CORE>;
|
|
reset-names = "pcie",
|
|
"pcie-ext",
|
|
"pcie-core";
|
|
|
|
power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_PCIE>;
|
|
|
|
brcm,serdes = <&serdes_cntl>;
|
|
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|