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771691ec83
Add backports of the following patches: "net: stmmac: explicitly deassert GMAC_AHB_RESET" and "ARM: dts: qcom: add ahb reset to ipq806x-gmac" Required for Meraki MR42/MR52. Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
65 lines
1.8 KiB
Diff
65 lines
1.8 KiB
Diff
From f95c4c56d65225a537a2d88735fde7ec4d37641d Mon Sep 17 00:00:00 2001
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From: Matthew Hagan <mnhagan88@gmail.com>
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Date: Sat, 5 Jun 2021 18:35:38 +0100
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Subject: ARM: dts: qcom: add ahb reset to ipq806x-gmac
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Add GMAC_AHB_RESET to the resets property of each gmac node.
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Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
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Link: https://lore.kernel.org/r/20210605173546.4102455-2-mnhagan88@gmail.com
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Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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---
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arch/arm/boot/dts/qcom-ipq8064.dtsi | 20 ++++++++++++--------
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1 file changed, 12 insertions(+), 8 deletions(-)
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--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
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@@ -1335,8 +1335,9 @@
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clocks = <&gcc GMAC_CORE1_CLK>;
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clock-names = "stmmaceth";
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- resets = <&gcc GMAC_CORE1_RESET>;
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- reset-names = "stmmaceth";
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+ resets = <&gcc GMAC_CORE1_RESET>,
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+ <&gcc GMAC_AHB_RESET>;
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+ reset-names = "stmmaceth", "ahb";
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status = "disabled";
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};
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@@ -1358,8 +1359,9 @@
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clocks = <&gcc GMAC_CORE2_CLK>;
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clock-names = "stmmaceth";
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- resets = <&gcc GMAC_CORE2_RESET>;
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- reset-names = "stmmaceth";
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+ resets = <&gcc GMAC_CORE2_RESET>,
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+ <&gcc GMAC_AHB_RESET>;
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+ reset-names = "stmmaceth", "ahb";
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status = "disabled";
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};
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@@ -1381,8 +1383,9 @@
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clocks = <&gcc GMAC_CORE3_CLK>;
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clock-names = "stmmaceth";
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- resets = <&gcc GMAC_CORE3_RESET>;
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- reset-names = "stmmaceth";
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+ resets = <&gcc GMAC_CORE3_RESET>,
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+ <&gcc GMAC_AHB_RESET>;
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+ reset-names = "stmmaceth", "ahb";
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status = "disabled";
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};
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@@ -1404,8 +1407,9 @@
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clocks = <&gcc GMAC_CORE4_CLK>;
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clock-names = "stmmaceth";
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- resets = <&gcc GMAC_CORE4_RESET>;
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- reset-names = "stmmaceth";
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+ resets = <&gcc GMAC_CORE4_RESET>,
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+ <&gcc GMAC_AHB_RESET>;
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+ reset-names = "stmmaceth", "ahb";
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status = "disabled";
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};
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