266 lines
6.6 KiB
Diff
266 lines
6.6 KiB
Diff
From 21ca3d7c59595d76237faebeff4f6a979cf7ae82 Mon Sep 17 00:00:00 2001
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From: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Date: Fri, 5 Apr 2024 13:45:24 +0200
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Subject: [PATCH 2/5] ARM: dts: stm32: put ETZPC as an access controller for
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STM32MP13x boards
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Reference ETZPC as an access-control-provider.
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For more information on which peripheral is securable or supports MCU
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isolation, please read the STM32MP13 reference manual
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Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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---
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arch/arm/boot/dts/st/stm32mp131.dtsi | 28 ++++++++++++++++++++++++++-
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arch/arm/boot/dts/st/stm32mp133.dtsi | 1 +
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arch/arm/boot/dts/st/stm32mp13xc.dtsi | 1 +
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arch/arm/boot/dts/st/stm32mp13xf.dtsi | 1 +
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4 files changed, 30 insertions(+), 1 deletion(-)
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--- a/arch/arm/boot/dts/st/stm32mp131.dtsi
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+++ b/arch/arm/boot/dts/st/stm32mp131.dtsi
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@@ -886,10 +886,11 @@
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};
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etzpc: bus@5c007000 {
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- compatible = "simple-bus";
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+ compatible = "st,stm32-etzpc", "simple-bus";
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reg = <0x5c007000 0x400>;
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#address-cells = <1>;
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#size-cells = <1>;
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+ #access-controller-cells = <1>;
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ranges;
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adc_2: adc@48004000 {
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@@ -902,6 +903,7 @@
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#interrupt-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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+ access-controllers = <&etzpc 33>;
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status = "disabled";
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adc2: adc@0 {
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@@ -949,6 +951,7 @@
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dr_mode = "otg";
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otg-rev = <0x200>;
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usb33d-supply = <&scmi_usb33>;
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+ access-controllers = <&etzpc 34>;
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status = "disabled";
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};
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@@ -962,6 +965,7 @@
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dmas = <&dmamux1 41 0x400 0x5>,
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<&dmamux1 42 0x400 0x1>;
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dma-names = "rx", "tx";
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+ access-controllers = <&etzpc 16>;
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status = "disabled";
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};
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@@ -975,6 +979,7 @@
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dmas = <&dmamux1 43 0x400 0x5>,
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<&dmamux1 44 0x400 0x1>;
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dma-names = "rx", "tx";
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+ access-controllers = <&etzpc 17>;
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status = "disabled";
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};
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@@ -986,6 +991,7 @@
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dmas = <&dmamux1 83 0x400 0x01>,
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<&dmamux1 84 0x400 0x01>;
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dma-names = "rx", "tx";
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+ access-controllers = <&etzpc 13>;
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status = "disabled";
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};
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@@ -1000,6 +1006,7 @@
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dmas = <&dmamux1 83 0x400 0x01>,
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<&dmamux1 84 0x400 0x01>;
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dma-names = "rx", "tx";
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+ access-controllers = <&etzpc 18>;
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status = "disabled";
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};
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@@ -1014,6 +1021,7 @@
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dmas = <&dmamux1 85 0x400 0x01>,
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<&dmamux1 86 0x400 0x01>;
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dma-names = "rx", "tx";
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+ access-controllers = <&etzpc 19>;
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status = "disabled";
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};
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@@ -1032,6 +1040,7 @@
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dma-names = "rx", "tx";
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st,syscfg-fmp = <&syscfg 0x4 0x4>;
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i2c-analog-filter;
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+ access-controllers = <&etzpc 20>;
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status = "disabled";
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};
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@@ -1050,6 +1059,7 @@
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dma-names = "rx", "tx";
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st,syscfg-fmp = <&syscfg 0x4 0x8>;
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i2c-analog-filter;
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+ access-controllers = <&etzpc 21>;
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status = "disabled";
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};
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@@ -1068,6 +1078,7 @@
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dma-names = "rx", "tx";
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st,syscfg-fmp = <&syscfg 0x4 0x10>;
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i2c-analog-filter;
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+ access-controllers = <&etzpc 22>;
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status = "disabled";
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};
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@@ -1080,6 +1091,7 @@
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interrupt-names = "global";
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clocks = <&rcc TIM12_K>;
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clock-names = "int";
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+ access-controllers = <&etzpc 23>;
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status = "disabled";
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pwm {
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@@ -1104,6 +1116,7 @@
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interrupt-names = "global";
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clocks = <&rcc TIM13_K>;
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clock-names = "int";
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+ access-controllers = <&etzpc 24>;
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status = "disabled";
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pwm {
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@@ -1128,6 +1141,7 @@
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interrupt-names = "global";
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clocks = <&rcc TIM14_K>;
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clock-names = "int";
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+ access-controllers = <&etzpc 25>;
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status = "disabled";
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pwm {
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@@ -1157,6 +1171,7 @@
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<&dmamux1 107 0x400 0x1>,
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<&dmamux1 108 0x400 0x1>;
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dma-names = "ch1", "up", "trig", "com";
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+ access-controllers = <&etzpc 26>;
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status = "disabled";
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pwm {
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@@ -1184,6 +1199,7 @@
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dmas = <&dmamux1 109 0x400 0x1>,
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<&dmamux1 110 0x400 0x1>;
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dma-names = "ch1", "up";
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+ access-controllers = <&etzpc 27>;
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status = "disabled";
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pwm {
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@@ -1211,6 +1227,7 @@
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dmas = <&dmamux1 111 0x400 0x1>,
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<&dmamux1 112 0x400 0x1>;
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dma-names = "ch1", "up";
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+ access-controllers = <&etzpc 28>;
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status = "disabled";
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pwm {
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@@ -1235,6 +1252,7 @@
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clocks = <&rcc LPTIM2_K>;
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clock-names = "mux";
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wakeup-source;
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+ access-controllers = <&etzpc 1>;
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status = "disabled";
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pwm {
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@@ -1269,6 +1287,7 @@
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clocks = <&rcc LPTIM3_K>;
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clock-names = "mux";
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wakeup-source;
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+ access-controllers = <&etzpc 2>;
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status = "disabled";
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pwm {
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@@ -1297,6 +1316,7 @@
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resets = <&rcc HASH1_R>;
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dmas = <&mdma 30 0x2 0x1000a02 0x0 0x0>;
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dma-names = "in";
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+ access-controllers = <&etzpc 41>;
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status = "disabled";
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};
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@@ -1305,6 +1325,7 @@
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reg = <0x54004000 0x400>;
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clocks = <&rcc RNG1_K>;
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resets = <&rcc RNG1_R>;
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+ access-controllers = <&etzpc 40>;
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status = "disabled";
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};
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@@ -1320,6 +1341,7 @@
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#size-cells = <1>;
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clocks = <&rcc FMC_K>;
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resets = <&rcc FMC_R>;
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+ access-controllers = <&etzpc 54>;
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status = "disabled";
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nand-controller@4,0 {
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@@ -1353,6 +1375,7 @@
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dma-names = "tx", "rx";
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clocks = <&rcc QSPI_K>;
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resets = <&rcc QSPI_R>;
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+ access-controllers = <&etzpc 55>;
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status = "disabled";
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};
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@@ -1367,6 +1390,7 @@
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cap-sd-highspeed;
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cap-mmc-highspeed;
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max-frequency = <130000000>;
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+ access-controllers = <&etzpc 50>;
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status = "disabled";
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};
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@@ -1381,6 +1405,7 @@
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cap-sd-highspeed;
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cap-mmc-highspeed;
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max-frequency = <130000000>;
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+ access-controllers = <&etzpc 51>;
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status = "disabled";
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};
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@@ -1394,6 +1419,7 @@
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resets = <&rcc USBPHY_R>;
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vdda1v1-supply = <&scmi_reg11>;
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vdda1v8-supply = <&scmi_reg18>;
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+ access-controllers = <&etzpc 5>;
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status = "disabled";
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usbphyc_port0: usb-phy@0 {
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--- a/arch/arm/boot/dts/st/stm32mp133.dtsi
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+++ b/arch/arm/boot/dts/st/stm32mp133.dtsi
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@@ -47,6 +47,7 @@
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#interrupt-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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+ access-controllers = <&etzpc 32>;
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status = "disabled";
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adc1: adc@0 {
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--- a/arch/arm/boot/dts/st/stm32mp13xc.dtsi
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+++ b/arch/arm/boot/dts/st/stm32mp13xc.dtsi
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@@ -11,6 +11,7 @@
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interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc CRYP1>;
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resets = <&rcc CRYP1_R>;
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+ access-controllers = <&etzpc 42>;
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status = "disabled";
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};
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};
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--- a/arch/arm/boot/dts/st/stm32mp13xf.dtsi
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+++ b/arch/arm/boot/dts/st/stm32mp13xf.dtsi
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@@ -11,6 +11,7 @@
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interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc CRYP1>;
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resets = <&rcc CRYP1_R>;
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+ access-controllers = <&etzpc 42>;
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status = "disabled";
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};
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};
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