231 lines
5.9 KiB
Diff
231 lines
5.9 KiB
Diff
From 22e9e6fcfb5042cb6d6c7874c459b034800092f1 Mon Sep 17 00:00:00 2001
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From: Peng Fan <peng.fan@nxp.com>
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Date: Sun, 11 Jun 2023 15:03:25 +0100
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Subject: [PATCH] nvmem: imx: support i.MX93 OCOTP
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Add i.MX93 OCOTP support. i.MX93 OCOTP has two parts: Fuse shadow
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block(fsb) and fuse managed by ELE. The FSB part could be directly
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accessed with MMIO, the ELE could only be accessed with ELE API.
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Currently the ELE API is not ready, so NULL function callback is used,
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but it was tested with downstream ELE API.
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Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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Message-ID: <20230611140330.154222-22-srinivas.kandagatla@linaro.org>
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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---
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drivers/nvmem/Kconfig | 9 ++
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drivers/nvmem/Makefile | 2 +
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drivers/nvmem/imx-ocotp-ele.c | 175 ++++++++++++++++++++++++++++++++++
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3 files changed, 186 insertions(+)
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create mode 100644 drivers/nvmem/imx-ocotp-ele.c
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--- a/drivers/nvmem/Kconfig
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+++ b/drivers/nvmem/Kconfig
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@@ -83,6 +83,15 @@ config NVMEM_IMX_OCOTP
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This driver can also be built as a module. If so, the module
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will be called nvmem-imx-ocotp.
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+config NVMEM_IMX_OCOTP_ELE
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+ tristate "i.MX On-Chip OTP Controller support"
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+ depends on ARCH_MXC || COMPILE_TEST
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+ depends on HAS_IOMEM
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+ depends on OF
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+ help
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+ This is a driver for the On-Chip OTP Controller (OCOTP)
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+ available on i.MX SoCs which has ELE.
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+
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config NVMEM_IMX_OCOTP_SCU
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tristate "i.MX8 SCU On-Chip OTP Controller support"
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depends on IMX_SCU
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--- a/drivers/nvmem/Makefile
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+++ b/drivers/nvmem/Makefile
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@@ -18,6 +18,8 @@ obj-$(CONFIG_NVMEM_IMX_IIM) += nvmem-im
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nvmem-imx-iim-y := imx-iim.o
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obj-$(CONFIG_NVMEM_IMX_OCOTP) += nvmem-imx-ocotp.o
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nvmem-imx-ocotp-y := imx-ocotp.o
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+obj-$(CONFIG_NVMEM_IMX_OCOTP_ELE) += nvmem-imx-ocotp-ele.o
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+nvmem-imx-ocotp-ele-y := imx-ocotp-ele.o
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obj-$(CONFIG_NVMEM_IMX_OCOTP_SCU) += nvmem-imx-ocotp-scu.o
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nvmem-imx-ocotp-scu-y := imx-ocotp-scu.o
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obj-$(CONFIG_NVMEM_JZ4780_EFUSE) += nvmem_jz4780_efuse.o
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--- /dev/null
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+++ b/drivers/nvmem/imx-ocotp-ele.c
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@@ -0,0 +1,175 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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+/*
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+ * i.MX9 OCOTP fusebox driver
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+ *
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+ * Copyright 2023 NXP
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+ */
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+
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+#include <linux/device.h>
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+#include <linux/io.h>
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+#include <linux/module.h>
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+#include <linux/nvmem-provider.h>
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+#include <linux/of_device.h>
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+#include <linux/platform_device.h>
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+#include <linux/slab.h>
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+
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+enum fuse_type {
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+ FUSE_FSB = 1,
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+ FUSE_ELE = 2,
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+ FUSE_INVALID = -1
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+};
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+
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+struct ocotp_map_entry {
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+ u32 start; /* start word */
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+ u32 num; /* num words */
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+ enum fuse_type type;
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+};
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+
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+struct ocotp_devtype_data {
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+ u32 reg_off;
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+ char *name;
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+ u32 size;
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+ u32 num_entry;
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+ u32 flag;
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+ nvmem_reg_read_t reg_read;
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+ struct ocotp_map_entry entry[];
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+};
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+
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+struct imx_ocotp_priv {
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+ struct device *dev;
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+ void __iomem *base;
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+ struct nvmem_config config;
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+ struct mutex lock;
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+ const struct ocotp_devtype_data *data;
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+};
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+
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+static enum fuse_type imx_ocotp_fuse_type(void *context, u32 index)
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+{
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+ struct imx_ocotp_priv *priv = context;
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+ const struct ocotp_devtype_data *data = priv->data;
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+ u32 start, end;
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+ int i;
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+
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+ for (i = 0; i < data->num_entry; i++) {
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+ start = data->entry[i].start;
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+ end = data->entry[i].start + data->entry[i].num;
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+
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+ if (index >= start && index < end)
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+ return data->entry[i].type;
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+ }
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+
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+ return FUSE_INVALID;
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+}
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+
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+static int imx_ocotp_reg_read(void *context, unsigned int offset, void *val, size_t bytes)
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+{
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+ struct imx_ocotp_priv *priv = context;
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+ void __iomem *reg = priv->base + priv->data->reg_off;
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+ u32 count, index, num_bytes;
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+ enum fuse_type type;
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+ u32 *buf;
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+ void *p;
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+ int i;
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+
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+ index = offset;
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+ num_bytes = round_up(bytes, 4);
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+ count = num_bytes >> 2;
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+
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+ if (count > ((priv->data->size >> 2) - index))
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+ count = (priv->data->size >> 2) - index;
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+
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+ p = kzalloc(num_bytes, GFP_KERNEL);
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+ if (!p)
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+ return -ENOMEM;
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+
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+ mutex_lock(&priv->lock);
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+
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+ buf = p;
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+
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+ for (i = index; i < (index + count); i++) {
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+ type = imx_ocotp_fuse_type(context, i);
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+ if (type == FUSE_INVALID || type == FUSE_ELE) {
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+ *buf++ = 0;
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+ continue;
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+ }
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+
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+ *buf++ = readl_relaxed(reg + (i << 2));
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+ }
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+
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+ memcpy(val, (u8 *)p, bytes);
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+
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+ mutex_unlock(&priv->lock);
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+
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+ kfree(p);
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+
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+ return 0;
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+};
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+
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+static int imx_ele_ocotp_probe(struct platform_device *pdev)
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+{
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+ struct device *dev = &pdev->dev;
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+ struct imx_ocotp_priv *priv;
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+ struct nvmem_device *nvmem;
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+
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+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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+ if (!priv)
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+ return -ENOMEM;
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+
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+ priv->data = of_device_get_match_data(dev);
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+
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+ priv->base = devm_platform_ioremap_resource(pdev, 0);
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+ if (IS_ERR(priv->base))
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+ return PTR_ERR(priv->base);
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+
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+ priv->config.dev = dev;
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+ priv->config.name = "ELE-OCOTP";
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+ priv->config.id = NVMEM_DEVID_AUTO;
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+ priv->config.owner = THIS_MODULE;
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+ priv->config.size = priv->data->size;
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+ priv->config.reg_read = priv->data->reg_read;
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+ priv->config.word_size = 4;
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+ priv->config.stride = 1;
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+ priv->config.priv = priv;
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+ priv->config.read_only = true;
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+ mutex_init(&priv->lock);
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+
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+ nvmem = devm_nvmem_register(dev, &priv->config);
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+ if (IS_ERR(nvmem))
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+ return PTR_ERR(nvmem);
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+
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+ return 0;
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+}
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+
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+static const struct ocotp_devtype_data imx93_ocotp_data = {
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+ .reg_off = 0x8000,
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+ .reg_read = imx_ocotp_reg_read,
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+ .size = 2048,
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+ .num_entry = 6,
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+ .entry = {
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+ { 0, 52, FUSE_FSB },
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+ { 63, 1, FUSE_ELE},
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+ { 128, 16, FUSE_ELE },
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+ { 182, 1, FUSE_ELE },
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+ { 188, 1, FUSE_ELE },
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+ { 312, 200, FUSE_FSB }
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+ },
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+};
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+
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+static const struct of_device_id imx_ele_ocotp_dt_ids[] = {
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+ { .compatible = "fsl,imx93-ocotp", .data = &imx93_ocotp_data, },
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+ {},
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+};
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+MODULE_DEVICE_TABLE(of, imx_ele_ocotp_dt_ids);
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+
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+static struct platform_driver imx_ele_ocotp_driver = {
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+ .driver = {
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+ .name = "imx_ele_ocotp",
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+ .of_match_table = imx_ele_ocotp_dt_ids,
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+ },
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+ .probe = imx_ele_ocotp_probe,
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+};
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+module_platform_driver(imx_ele_ocotp_driver);
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+
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+MODULE_DESCRIPTION("i.MX OCOTP/ELE driver");
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+MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
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+MODULE_LICENSE("GPL");
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