191 lines
5.4 KiB
Diff
191 lines
5.4 KiB
Diff
From 9b3303413379af8bed307cd465fe7aa1bc3569ea Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
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Date: Wed, 24 Mar 2021 09:19:18 +0100
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Subject: [PATCH 17/22] dt-bindings: add BCM63268 pincontroller binding
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documentation
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Add binding documentation for the pincontrol core found in the BCM63268
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family SoCs.
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Co-developed-by: Jonas Gorski <jonas.gorski@gmail.com>
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Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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Reviewed-by: Rob Herring <robh@kernel.org>
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Link: https://lore.kernel.org/r/20210324081923.20379-18-noltari@gmail.com
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Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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---
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.../pinctrl/brcm,bcm63268-pinctrl.yaml | 164 ++++++++++++++++++
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1 file changed, 164 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml
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@@ -0,0 +1,164 @@
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+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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+%YAML 1.2
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+---
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+$id: http://devicetree.org/schemas/pinctrl/brcm,bcm63268-pinctrl.yaml#
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+$schema: http://devicetree.org/meta-schemas/core.yaml#
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+
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+title: Broadcom BCM63268 pin controller
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+
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+maintainers:
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+ - Álvaro Fernández Rojas <noltari@gmail.com>
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+ - Jonas Gorski <jonas.gorski@gmail.com>
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+
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+description:
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+ Bindings for Broadcom's BCM63268 memory-mapped pin controller.
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+
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+properties:
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+ compatible:
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+ const: brcm,bcm63268-pinctrl
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+
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+ reg:
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+ maxItems: 3
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+
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+patternProperties:
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+ '-pins$':
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+ type: object
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+ $ref: pinmux-node.yaml#
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+
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+ properties:
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+ function:
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+ enum: [ serial_led_clk, serial_led_data, hsspi_cs4, hsspi_cs5,
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+ hsspi_cs6, hsspi_cs7, adsl_spi_miso, adsl_spi_mosi,
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+ vreq_clk, pcie_clkreq_b, robosw_led_clk, robosw_led_data,
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+ nand, gpio35_alt, dectpd, vdsl_phy_override_0,
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+ vdsl_phy_override_1, vdsl_phy_override_2,
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+ vdsl_phy_override_3, dsl_gpio8, dsl_gpio9 ]
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+
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+ pins:
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+ enum: [ gpio0, gpio1, gpio16, gpio17, gpio8, gpio9, gpio18, gpio19,
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+ gpio22, gpio23, gpio30, gpio31, nand_grp, gpio35
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+ dectpd_grp, vdsl_phy_override_0_grp,
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+ vdsl_phy_override_1_grp, vdsl_phy_override_2_grp,
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+ vdsl_phy_override_3_grp, dsl_gpio8, dsl_gpio9 ]
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+
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+required:
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+ - compatible
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+ - reg
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+
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+additionalProperties: false
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+
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+examples:
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+ - |
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+ pinctrl@10 {
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+ compatible = "brcm,bcm63268-pinctrl";
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+ reg = <0x10 0x4>, <0x18 0x8>, <0x38 0x4>;
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+
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+ pinctrl_serial_led: serial_led-pins {
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+ pinctrl_serial_led_clk: serial_led_clk-pins {
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+ function = "serial_led_clk";
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+ pins = "gpio0";
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+ };
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+
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+ pinctrl_serial_led_data: serial_led_data-pins {
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+ function = "serial_led_data";
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+ pins = "gpio1";
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+ };
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+ };
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+
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+ pinctrl_hsspi_cs4: hsspi_cs4-pins {
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+ function = "hsspi_cs4";
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+ pins = "gpio16";
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+ };
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+
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+ pinctrl_hsspi_cs5: hsspi_cs5-pins {
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+ function = "hsspi_cs5";
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+ pins = "gpio17";
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+ };
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+
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+ pinctrl_hsspi_cs6: hsspi_cs6-pins {
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+ function = "hsspi_cs6";
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+ pins = "gpio8";
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+ };
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+
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+ pinctrl_hsspi_cs7: hsspi_cs7-pins {
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+ function = "hsspi_cs7";
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+ pins = "gpio9";
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+ };
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+
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+ pinctrl_adsl_spi: adsl_spi-pins {
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+ pinctrl_adsl_spi_miso: adsl_spi_miso-pins {
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+ function = "adsl_spi_miso";
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+ pins = "gpio18";
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+ };
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+
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+ pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins {
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+ function = "adsl_spi_mosi";
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+ pins = "gpio19";
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+ };
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+ };
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+
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+ pinctrl_vreq_clk: vreq_clk-pins {
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+ function = "vreq_clk";
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+ pins = "gpio22";
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+ };
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+
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+ pinctrl_pcie_clkreq_b: pcie_clkreq_b-pins {
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+ function = "pcie_clkreq_b";
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+ pins = "gpio23";
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+ };
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+
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+ pinctrl_robosw_led_clk: robosw_led_clk-pins {
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+ function = "robosw_led_clk";
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+ pins = "gpio30";
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+ };
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+
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+ pinctrl_robosw_led_data: robosw_led_data-pins {
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+ function = "robosw_led_data";
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+ pins = "gpio31";
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+ };
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+
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+ pinctrl_nand: nand-pins {
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+ function = "nand";
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+ group = "nand_grp";
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+ };
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+
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+ pinctrl_gpio35_alt: gpio35_alt-pins {
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+ function = "gpio35_alt";
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+ pin = "gpio35";
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+ };
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+
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+ pinctrl_dectpd: dectpd-pins {
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+ function = "dectpd";
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+ group = "dectpd_grp";
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+ };
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+
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+ pinctrl_vdsl_phy_override_0: vdsl_phy_override_0-pins {
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+ function = "vdsl_phy_override_0";
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+ group = "vdsl_phy_override_0_grp";
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+ };
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+
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+ pinctrl_vdsl_phy_override_1: vdsl_phy_override_1-pins {
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+ function = "vdsl_phy_override_1";
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+ group = "vdsl_phy_override_1_grp";
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+ };
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+
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+ pinctrl_vdsl_phy_override_2: vdsl_phy_override_2-pins {
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+ function = "vdsl_phy_override_2";
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+ group = "vdsl_phy_override_2_grp";
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+ };
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+
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+ pinctrl_vdsl_phy_override_3: vdsl_phy_override_3-pins {
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+ function = "vdsl_phy_override_3";
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+ group = "vdsl_phy_override_3_grp";
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+ };
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+
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+ pinctrl_dsl_gpio8: dsl_gpio8-pins {
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+ function = "dsl_gpio8";
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+ group = "dsl_gpio8";
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+ };
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+
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+ pinctrl_dsl_gpio9: dsl_gpio9-pins {
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+ function = "dsl_gpio9";
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+ group = "dsl_gpio9";
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+ };
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+ };
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