mirror of
git://git.openwrt.org/openwrt/openwrt.git
synced 2024-12-19 13:20:36 +00:00
138 lines
4.1 KiB
Diff
138 lines
4.1 KiB
Diff
This commit adds the implementation of ->suspend() and ->resume()
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platform_driver hooks in order to save and restore the state of the
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GPIO configuration. In order to achieve that, additional fields are
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added to the mvebu_gpio_chip structure.
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Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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Acked-by: Alexandre Courbot <acourbot@nvidia.com>
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Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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--- a/drivers/gpio/gpio-mvebu.c
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+++ b/drivers/gpio/gpio-mvebu.c
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@@ -83,6 +83,14 @@ struct mvebu_gpio_chip {
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int irqbase;
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struct irq_domain *domain;
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int soc_variant;
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+
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+ /* Used to preserve GPIO registers accross suspend/resume */
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+ u32 out_reg;
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+ u32 io_conf_reg;
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+ u32 blink_en_reg;
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+ u32 in_pol_reg;
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+ u32 edge_mask_regs[4];
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+ u32 level_mask_regs[4];
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};
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/*
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@@ -554,6 +562,93 @@ static const struct of_device_id mvebu_g
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};
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MODULE_DEVICE_TABLE(of, mvebu_gpio_of_match);
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+static int mvebu_gpio_suspend(struct platform_device *pdev, pm_message_t state)
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+{
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+ struct mvebu_gpio_chip *mvchip = platform_get_drvdata(pdev);
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+ int i;
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+
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+ mvchip->out_reg = readl(mvebu_gpioreg_out(mvchip));
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+ mvchip->io_conf_reg = readl(mvebu_gpioreg_io_conf(mvchip));
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+ mvchip->blink_en_reg = readl(mvebu_gpioreg_blink(mvchip));
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+ mvchip->in_pol_reg = readl(mvebu_gpioreg_in_pol(mvchip));
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+
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+ switch (mvchip->soc_variant) {
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+ case MVEBU_GPIO_SOC_VARIANT_ORION:
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+ mvchip->edge_mask_regs[0] =
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+ readl(mvchip->membase + GPIO_EDGE_MASK_OFF);
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+ mvchip->level_mask_regs[0] =
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+ readl(mvchip->membase + GPIO_LEVEL_MASK_OFF);
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+ break;
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+ case MVEBU_GPIO_SOC_VARIANT_MV78200:
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+ for (i = 0; i < 2; i++) {
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+ mvchip->edge_mask_regs[i] =
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+ readl(mvchip->membase +
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+ GPIO_EDGE_MASK_MV78200_OFF(i));
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+ mvchip->level_mask_regs[i] =
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+ readl(mvchip->membase +
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+ GPIO_LEVEL_MASK_MV78200_OFF(i));
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+ }
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+ break;
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+ case MVEBU_GPIO_SOC_VARIANT_ARMADAXP:
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+ for (i = 0; i < 4; i++) {
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+ mvchip->edge_mask_regs[i] =
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+ readl(mvchip->membase +
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+ GPIO_EDGE_MASK_ARMADAXP_OFF(i));
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+ mvchip->level_mask_regs[i] =
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+ readl(mvchip->membase +
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+ GPIO_LEVEL_MASK_ARMADAXP_OFF(i));
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+ }
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+ break;
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+ default:
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+ BUG();
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+ }
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+
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+ return 0;
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+}
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+
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+static int mvebu_gpio_resume(struct platform_device *pdev)
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+{
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+ struct mvebu_gpio_chip *mvchip = platform_get_drvdata(pdev);
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+ int i;
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+
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+ writel(mvchip->out_reg, mvebu_gpioreg_out(mvchip));
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+ writel(mvchip->io_conf_reg, mvebu_gpioreg_io_conf(mvchip));
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+ writel(mvchip->blink_en_reg, mvebu_gpioreg_blink(mvchip));
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+ writel(mvchip->in_pol_reg, mvebu_gpioreg_in_pol(mvchip));
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+
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+ switch (mvchip->soc_variant) {
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+ case MVEBU_GPIO_SOC_VARIANT_ORION:
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+ writel(mvchip->edge_mask_regs[0],
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+ mvchip->membase + GPIO_EDGE_MASK_OFF);
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+ writel(mvchip->level_mask_regs[0],
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+ mvchip->membase + GPIO_LEVEL_MASK_OFF);
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+ break;
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+ case MVEBU_GPIO_SOC_VARIANT_MV78200:
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+ for (i = 0; i < 2; i++) {
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+ writel(mvchip->edge_mask_regs[i],
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+ mvchip->membase + GPIO_EDGE_MASK_MV78200_OFF(i));
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+ writel(mvchip->level_mask_regs[i],
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+ mvchip->membase +
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+ GPIO_LEVEL_MASK_MV78200_OFF(i));
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+ }
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+ break;
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+ case MVEBU_GPIO_SOC_VARIANT_ARMADAXP:
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+ for (i = 0; i < 4; i++) {
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+ writel(mvchip->edge_mask_regs[i],
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+ mvchip->membase +
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+ GPIO_EDGE_MASK_ARMADAXP_OFF(i));
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+ writel(mvchip->level_mask_regs[i],
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+ mvchip->membase +
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+ GPIO_LEVEL_MASK_ARMADAXP_OFF(i));
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+ }
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+ break;
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+ default:
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+ BUG();
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+ }
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+
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+ return 0;
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+}
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+
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static int mvebu_gpio_probe(struct platform_device *pdev)
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{
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struct mvebu_gpio_chip *mvchip;
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@@ -577,6 +672,8 @@ static int mvebu_gpio_probe(struct platf
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if (!mvchip)
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return -ENOMEM;
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+ platform_set_drvdata(pdev, mvchip);
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+
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if (of_property_read_u32(pdev->dev.of_node, "ngpios", &ngpios)) {
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dev_err(&pdev->dev, "Missing ngpios OF property\n");
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return -ENODEV;
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@@ -735,5 +832,7 @@ static struct platform_driver mvebu_gpio
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.of_match_table = mvebu_gpio_of_match,
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},
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.probe = mvebu_gpio_probe,
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+ .suspend = mvebu_gpio_suspend,
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+ .resume = mvebu_gpio_resume,
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};
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module_platform_driver(mvebu_gpio_driver);
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