59 lines
2.6 KiB
Diff
59 lines
2.6 KiB
Diff
From e36f12a1d319b53d5f52b91671188a74e0a1fb41 Mon Sep 17 00:00:00 2001
|
|
From: Madalin Bucur <madalin.bucur@nxp.com>
|
|
Date: Tue, 23 Apr 2019 16:38:19 +0300
|
|
Subject: [PATCH] sdk_dpaa: SGMII 2500 needs AN disabled
|
|
|
|
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
|
|
---
|
|
.../ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac.c | 14 ++++++++++----
|
|
.../ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac.h | 1 +
|
|
2 files changed, 11 insertions(+), 4 deletions(-)
|
|
|
|
--- a/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac.c
|
|
+++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac.c
|
|
@@ -84,6 +84,7 @@ static void SetupSgmiiInternalPhy(t_Mema
|
|
{
|
|
uint16_t tmpReg16;
|
|
e_EnetMode enetMode;
|
|
+ bool autoneg_disabled = p_Memac->enetMode == e_ENET_MODE_SGMII_2500;
|
|
|
|
/* In case the higher MACs are used (i.e. the MACs that should support 10G),
|
|
speed=10000 is provided for SGMII ports. Temporary modify enet mode
|
|
@@ -92,8 +93,9 @@ static void SetupSgmiiInternalPhy(t_Mema
|
|
|
|
/* SGMII mode + AN enable */
|
|
tmpReg16 = PHY_SGMII_IF_MODE_AN | PHY_SGMII_IF_MODE_SGMII;
|
|
- if ((p_Memac->enetMode) == e_ENET_MODE_SGMII_2500)
|
|
- tmpReg16 = PHY_SGMII_CR_PHY_RESET | PHY_SGMII_IF_SPEED_GIGABIT | PHY_SGMII_IF_MODE_SGMII;
|
|
+ /* unless SGMII 2500 where AN needs to be disabled */
|
|
+ if (autoneg_disabled)
|
|
+ tmpReg16 = PHY_SGMII_IF_SPEED_GIGABIT | PHY_SGMII_IF_MODE_SGMII;
|
|
|
|
p_Memac->enetMode = MAKE_ENET_MODE(ENET_INTERFACE_FROM_MODE(p_Memac->enetMode), e_ENET_SPEED_1000);
|
|
MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x14, tmpReg16);
|
|
@@ -116,8 +118,12 @@ static void SetupSgmiiInternalPhy(t_Mema
|
|
MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x13, 0x0007);
|
|
MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x12, 0xa120);
|
|
|
|
- /* Restart AN */
|
|
- tmpReg16 = PHY_SGMII_CR_DEF_VAL | PHY_SGMII_CR_RESET_AN;
|
|
+ if (!autoneg_disabled)
|
|
+ /* Restart AN */
|
|
+ tmpReg16 = PHY_SGMII_CR_DEF_VAL | PHY_SGMII_CR_RESET_AN;
|
|
+ else
|
|
+ /* Disable AN */
|
|
+ tmpReg16 = PHY_SGMII_CR_DEF_VAL & ~PHY_SGMII_CR_AN_EN;
|
|
MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x0, tmpReg16);
|
|
|
|
/* Restore original enet mode */
|
|
--- a/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac.h
|
|
+++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac.h
|
|
@@ -93,6 +93,7 @@ typedef struct
|
|
#define PHY_SGMII_CR_PHY_RESET 0x8000
|
|
#define PHY_SGMII_CR_RESET_AN 0x0200
|
|
#define PHY_SGMII_CR_DEF_VAL 0x1140
|
|
+#define PHY_SGMII_CR_AN_EN 0x1000
|
|
#define PHY_SGMII_DEV_ABILITY_SGMII 0x4001
|
|
#define PHY_SGMII_DEV_ABILITY_1000X 0x01A0
|
|
#define PHY_SGMII_IF_SPEED_GIGABIT 0x0008
|