67 lines
2.1 KiB
Diff
67 lines
2.1 KiB
Diff
From 28f9a5e2a3f5441ab5594669ed82da11e32277a9 Mon Sep 17 00:00:00 2001
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From: Kristian Evensen <kristian.evensen@gmail.com>
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Date: Mon, 30 Apr 2018 14:38:01 +0200
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Subject: [PATCH] phy: phy-mtk-tphy: Add hifsys-support
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---
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drivers/phy/mediatek/phy-mtk-tphy.c | 20 ++++++++++++++++++++
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1 file changed, 20 insertions(+)
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--- a/drivers/phy/mediatek/phy-mtk-tphy.c
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+++ b/drivers/phy/mediatek/phy-mtk-tphy.c
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@@ -15,6 +15,8 @@
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#include <linux/of_device.h>
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#include <linux/phy/phy.h>
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#include <linux/platform_device.h>
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+#include <linux/mfd/syscon.h>
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+#include <linux/regmap.h>
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/* version V1 sub-banks offset base address */
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/* banks shared by multiple phys */
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@@ -263,6 +265,9 @@
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#define RG_CDR_BIRLTD0_GEN3_MSK GENMASK(4, 0)
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#define RG_CDR_BIRLTD0_GEN3_VAL(x) (0x1f & (x))
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+#define HIF_SYSCFG1 0x14
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+#define HIF_SYSCFG1_PHY2_MASK (0x3 << 20)
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+
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enum mtk_phy_version {
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MTK_PHY_V1 = 1,
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MTK_PHY_V2,
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@@ -310,6 +315,7 @@ struct mtk_tphy {
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struct clk *u3phya_ref; /* reference clock of usb3 anolog phy */
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const struct mtk_phy_pdata *pdata;
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struct mtk_phy_instance **phys;
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+ struct regmap *hif;
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int nphys;
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int src_ref_clk; /* MHZ, reference clock for slew rate calibrate */
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int src_coef; /* coefficient for slew rate calibrate */
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@@ -629,6 +635,10 @@ static void pcie_phy_instance_init(struc
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if (tphy->pdata->version != MTK_PHY_V1)
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return;
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+ if (tphy->hif)
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+ regmap_update_bits(tphy->hif, HIF_SYSCFG1,
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+ HIF_SYSCFG1_PHY2_MASK, 0);
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+
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tmp = readl(u3_banks->phya + U3P_U3_PHYA_DA_REG0);
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tmp &= ~(P3A_RG_XTAL_EXT_PE1H | P3A_RG_XTAL_EXT_PE2H);
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tmp |= P3A_RG_XTAL_EXT_PE1H_VAL(0x2) | P3A_RG_XTAL_EXT_PE2H_VAL(0x2);
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@@ -1114,6 +1124,16 @@ static int mtk_tphy_probe(struct platfor
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&tphy->src_ref_clk);
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device_property_read_u32(dev, "mediatek,src-coef", &tphy->src_coef);
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+ if (of_find_property(np, "mediatek,phy-switch", NULL)) {
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+ tphy->hif = syscon_regmap_lookup_by_phandle(np,
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+ "mediatek,phy-switch");
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+ if (IS_ERR(tphy->hif)) {
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+ dev_err(&pdev->dev,
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+ "missing \"mediatek,phy-switch\" phandle\n");
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+ return PTR_ERR(tphy->hif);
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+ }
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+ }
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+
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port = 0;
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for_each_child_of_node(np, child_np) {
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struct mtk_phy_instance *instance;
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