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abc5b28db1
Northstar SoCs have pretty small CPU caches and their performance is heavily affected by cache hits & misses. It means that all kind of random code changes can affect performance as they often reorganize (change alignment & possibly reorder) kernel symbols. It was discussed in ARM / net mailinglists: 1. ARM router NAT performance affected by random/unrelated commits [1] [2] 2. Optimizing kernel compilation / alignments for network performance [3] [4] It seems that -falign-functions can be used as a partial workaround. It doesn't solve all cases (e.g. documented watchdog one [5]) but it surely helps with many of them. A complete long term solution may be PGO (profile-guided optimization) but it isn't available at this point. [1] https://lkml.org/lkml/2019/5/21/349 [2] https://www.spinics.net/lists/linux-block/msg40624.html [3] https://lore.kernel.org/linux-arm-kernel/066fc320-dc04-11a4-476e-b0d11f3b17e6@gmail.com/T/ [4] https://www.spinics.net/lists/netdev/msg816103.html [5] http://lists.openwrt.org/pipermail/openwrt-devel/2022-July/038989.html Signed-off-by: Rafał Miłecki <rafal@milecki.pl> |
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