164 lines
5.0 KiB
Diff
164 lines
5.0 KiB
Diff
From fb9da17bd26552f48cda4f2f658379e7f5860691 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
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Date: Wed, 24 Mar 2021 09:19:04 +0100
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Subject: [PATCH 03/22] dt-bindings: improve BCM6345 GPIO binding documentation
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Convert existing BCM6345 GPIO binding documentation to YAML and add binding
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documentation for the GPIO controller found in BCM6318, BCM6328, BCM6358,
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BCM6362, BCM6368 and BCM63268 SoCs.
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Co-developed-by: Jonas Gorski <jonas.gorski@gmail.com>
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Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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Reviewed-by: Rob Herring <robh@kernel.org>
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Link: https://lore.kernel.org/r/20210324081923.20379-4-noltari@gmail.com
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Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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---
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.../bindings/gpio/brcm,bcm6345-gpio.txt | 46 ----------
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.../bindings/gpio/brcm,bcm6345-gpio.yaml | 86 +++++++++++++++++++
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2 files changed, 86 insertions(+), 46 deletions(-)
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delete mode 100644 Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.txt
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create mode 100644 Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml
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--- a/Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.txt
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+++ /dev/null
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@@ -1,46 +0,0 @@
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-Bindings for the Broadcom's brcm,bcm6345-gpio memory-mapped GPIO controllers.
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-
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-These bindings can be used on any BCM63xx SoC. However, BCM6338 and BCM6345
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-are the only ones which don't need a pinctrl driver.
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-BCM6338 have 8-bit data and dirout registers, where GPIO state can be read
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-and/or written, and the direction changed from input to output.
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-BCM6345 have 16-bit data and dirout registers, where GPIO state can be read
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-and/or written, and the direction changed from input to output.
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-
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-Required properties:
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- - compatible: should be "brcm,bcm6345-gpio"
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- - reg-names: must contain
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- "dat" - data register
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- "dirout" - direction (output) register
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- - reg: address + size pairs describing the GPIO register sets;
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- order must correspond with the order of entries in reg-names
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- - #gpio-cells: must be set to 2. The first cell is the pin number and
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- the second cell is used to specify the gpio polarity:
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- 0 = active high
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- 1 = active low
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- - gpio-controller: Marks the device node as a gpio controller.
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-
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-Optional properties:
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- - native-endian: use native endian memory.
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-
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-Examples:
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- - BCM6338:
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- gpio: gpio-controller@fffe0407 {
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- compatible = "brcm,bcm6345-gpio";
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- reg-names = "dirout", "dat";
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- reg = <0xfffe0407 1>, <0xfffe040f 1>;
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-
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- #gpio-cells = <2>;
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- gpio-controller;
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- };
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-
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- - BCM6345:
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- gpio: gpio-controller@fffe0406 {
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- compatible = "brcm,bcm6345-gpio";
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- reg-names = "dirout", "dat";
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- reg = <0xfffe0406 2>, <0xfffe040a 2>;
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- native-endian;
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-
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- #gpio-cells = <2>;
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- gpio-controller;
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- };
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml
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@@ -0,0 +1,86 @@
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+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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+%YAML 1.2
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+---
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+$id: http://devicetree.org/schemas/gpio/brcm,bcm6345-gpio.yaml#
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+$schema: http://devicetree.org/meta-schemas/core.yaml#
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+
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+title: Broadcom BCM6345 GPIO controller
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+
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+maintainers:
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+ - Álvaro Fernández Rojas <noltari@gmail.com>
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+ - Jonas Gorski <jonas.gorski@gmail.com>
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+
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+description: |+
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+ Bindings for Broadcom's BCM63xx memory-mapped GPIO controllers.
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+
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+ These bindings can be used on any BCM63xx SoC. However, BCM6338 and BCM6345
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+ are the only ones which don't need a pinctrl driver.
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+
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+ BCM6338 have 8-bit data and dirout registers, where GPIO state can be read
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+ and/or written, and the direction changed from input to output.
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+ BCM6345 have 16-bit data and dirout registers, where GPIO state can be read
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+ and/or written, and the direction changed from input to output.
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+ BCM6318, BCM6328, BCM6358, BCM6362, BCM6368 and BCM63268 have 32-bit data
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+ and dirout registers, where GPIO state can be read and/or written, and the
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+ direction changed from input to output.
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+
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+properties:
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+ compatible:
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+ enum:
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+ - brcm,bcm6318-gpio
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+ - brcm,bcm6328-gpio
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+ - brcm,bcm6345-gpio
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+ - brcm,bcm6358-gpio
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+ - brcm,bcm6362-gpio
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+ - brcm,bcm6368-gpio
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+ - brcm,bcm63268-gpio
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+
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+ gpio-controller: true
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+
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+ "#gpio-cells":
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+ const: 2
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+
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+ gpio-ranges:
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+ maxItems: 1
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+
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+ native-endian: true
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+
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+ reg:
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+ maxItems: 2
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+
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+ reg-names:
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+ items:
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+ - const: dirout
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+ - const: dat
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+
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+required:
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+ - compatible
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+ - reg
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+ - reg-names
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+ - gpio-controller
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+ - '#gpio-cells'
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+
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+additionalProperties: false
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+
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+examples:
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+ - |
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+ gpio@fffe0406 {
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+ compatible = "brcm,bcm6345-gpio";
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+ reg-names = "dirout", "dat";
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+ reg = <0xfffe0406 2>, <0xfffe040a 2>;
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+ native-endian;
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+
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ };
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+
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+ - |
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+ gpio@0 {
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+ compatible = "brcm,bcm63268-gpio";
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+ reg-names = "dirout", "dat";
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+ reg = <0x0 0x8>, <0x8 0x8>;
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+
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+ gpio-controller;
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+ gpio-ranges = <&pinctrl 0 0 52>;
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+ #gpio-cells = <2>;
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+ };
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