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10d8e4b66c
Those are defined in the SoC specific .dtsi files. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 36237
106 lines
1.9 KiB
Plaintext
106 lines
1.9 KiB
Plaintext
/dts-v1/;
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/include/ "rt3050.dtsi"
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/ {
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compatible = "WL-351", "ralink,rt3052-soc";
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model = "Sitecom WL-351 v1 002";
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memorydetect {
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ralink,memory = <0x0 0x200000 0x4000000>;
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};
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chosen {
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bootargs = "console=ttyS0,57600 mtdparts=1f000000.cfi:192k(u-boot)ro,64k(u-boot-env)ro,64k(factory)ro,3776k@0x50000(firmware)";
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};
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palmbus@10000000 {
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sysc@0 {
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ralink,pinmux = "uartlite", "jtag", "sdram", "rgmii";
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ralink,gpiomux = "i2c", "spi", "mdio";
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ralink,uartmux = "gpio";
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ralink,wdtmux = <1>;
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};
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gpio0: gpio@600 {
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status = "okay";
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};
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};
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cfi@1f000000 {
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compatible = "cfi-flash";
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reg = <0x1f000000 0x800000>;
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bank-width = <2>;
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device-width = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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ethernet@10100000 {
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status = "okay";
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};
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esw@10110000 {
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status = "okay";
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ralink,portmap = <0x3f>;
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ralink,fct2 = <0x0002500c>;
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/*
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* ext phy base addr 31, rx/tx clock skew 0,
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* turbo mii off, rgmi 3.3v off, port 5 polling off
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* port5: enabled, gige, full-duplex, rx/tx-flow-control
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* port6: enabled, gige, full-duplex, rx/tx-flow-control
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*/
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ralink,fpa2 = <0x1f003fff>;
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};
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wmac@10180000 {
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status = "okay";
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};
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otg@101c0000 {
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status = "okay";
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};
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gpio-leds {
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compatible = "gpio-leds";
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power {
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label = "wl-351:amber:power";
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gpio = <&gpio0 8 1>;
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};
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unpopulated {
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label = "wl-351:amber:unpopulated";
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gpio = <&gpio0 12 1>;
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};
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unpopulated2 {
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label = "wl-351:blue:unpopulated";
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gpio = <&gpio0 13 1>;
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};
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <20>;
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reset {
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label = "reset";
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gpio = <&gpio0 10 1>;
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linux,code = <0x198>;
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};
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wps {
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label = "wps";
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gpio = <&gpio0 0 1>;
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linux,code = <0x211>;
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};
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};
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rtl8366rb {
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compatible = "rtl8367rb";
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gpio-sda = <&gpio0 1 0>;
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gpio-sck = <&gpio0 2 0>;
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};
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};
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