openwrt/target/linux/lantiq/patches-4.1/0041-USB-DWC2-add-ltq-params.patch
John Crispin 404b183aa8 lantiq: Add AR9 compatibility bits to DWC2 driver
Add AR9 DTS definition to be recognized by the DWC2 driver.

The same driver parameters can be mostly used except that some boards
seem to erroneously report OTG HNP/SRP capability of the USB HCD.
Forcing the HNP/SRP off allows these boards to work with the DWC2 as well.

Signed-off-by: Antti Seppälä <a.seppala@gmail.com>

SVN-Revision: 46915
2015-09-14 20:08:15 +00:00

47 lines
1.5 KiB
Diff

--- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c
@@ -107,6 +107,34 @@ static const struct dwc2_core_params par
.uframe_sched = -1,
};
+static const struct dwc2_core_params params_ltq = {
+ .otg_cap = 2, /* non-HNP/non-SRP */
+ .otg_ver = -1,
+ .dma_enable = -1,
+ .dma_desc_enable = -1,
+ .speed = -1,
+ .enable_dynamic_fifo = -1,
+ .en_multiple_tx_fifo = -1,
+ .host_rx_fifo_size = 240, /* 240 DWORDs */
+ .host_nperio_tx_fifo_size = 240, /* 240 DWORDs */
+ .host_perio_tx_fifo_size = 32, /* 32 DWORDs */
+ .max_transfer_size = -1,
+ .max_packet_count = -1,
+ .host_channels = -1,
+ .phy_type = -1,
+ .phy_utmi_width = -1,
+ .phy_ulpi_ddr = -1,
+ .phy_ulpi_ext_vbus = -1,
+ .i2c_enable = -1,
+ .ulpi_fs_ls = -1,
+ .host_support_fs_ls_low_power = -1,
+ .host_ls_low_power_phy_clk = -1,
+ .ts_dline = -1,
+ .reload_ctl = -1,
+ .ahbcfg = -1,
+ .uframe_sched = -1,
+};
+
/**
* dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
* DWC_otg driver
@@ -133,6 +161,8 @@ static int dwc2_driver_remove(struct pla
static const struct of_device_id dwc2_of_match_table[] = {
{ .compatible = "brcm,bcm2835-usb", .data = &params_bcm2835 },
{ .compatible = "rockchip,rk3066-usb", .data = &params_rk3066 },
+ { .compatible = "lantiq,ifxhcd-arx100-dwc2", .data = &params_ltq },
+ { .compatible = "lantiq,ifxhcd-xrx200-dwc2", .data = &params_ltq },
{ .compatible = "snps,dwc2", .data = NULL },
{ .compatible = "samsung,s3c6400-hsotg", .data = NULL},
{},