366 lines
6.1 KiB
Plaintext
366 lines
6.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "mt7622.dtsi"
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#include "mt6380.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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aliases {
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serial0 = &uart0;
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label-mac-device = &gmac0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
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};
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cpus {
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cpu@0 {
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proc-supply = <&mt6380_vcpu_reg>;
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sram-supply = <&mt6380_vm_reg>;
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};
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cpu@1 {
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proc-supply = <&mt6380_vcpu_reg>;
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sram-supply = <&mt6380_vm_reg>;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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button-reset {
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gpios = <&pio 0 GPIO_ACTIVE_LOW>;
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label = "reset";
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linux,code = <KEY_RESTART>;
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};
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button-wps {
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gpios = <&pio 102 GPIO_ACTIVE_LOW>;
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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memory {
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reg = <0 0x40000000 0 0x40000000>;
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};
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};
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&bch {
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status = "okay";
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};
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ð {
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pinctrl-names = "default";
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pinctrl-0 = <ð_pins>;
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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phy-mode = "2500base-x";
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reg = <0>;
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nvmem-cells = <&macaddr_odm 1>;
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nvmem-cell-names = "mac-address";
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fixed-link {
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full-duplex;
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pause;
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speed = <2500>;
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};
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};
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mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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switch: switch@1f {
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compatible = "mediatek,mt7531";
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reg = <31>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&pio>;
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interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
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reset-gpios = <&pio 54 0>;
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ports {
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wan: port@4 {
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reg = <4>;
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label = "wan";
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nvmem-cells = <&macaddr_odm 0>;
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nvmem-cell-names = "mac-address";
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};
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port@6 {
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reg = <6>;
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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};
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};
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&pcie0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie0_pins>;
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status = "okay";
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};
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&pcie1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie1_pins>;
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status = "okay";
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};
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&pio {
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epa_elna_pins: epa-elna-pins {
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mux {
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function = "antsel";
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groups = "antsel0", "antsel1", "antsel2", "antsel3",
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"antsel4", "antsel5", "antsel6", "antsel7",
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"antsel8", "antsel9", "antsel12", "antsel13",
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"antsel14", "antsel15", "antsel16", "antsel17";
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};
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};
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eth_pins: eth-pins {
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mux {
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function = "eth";
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groups = "mdc_mdio", "rgmii_via_gmac2";
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};
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};
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pcie0_pins: pcie0-pins {
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mux {
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function = "pcie";
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groups = "pcie0_pad_perst",
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"pcie0_1_waken",
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"pcie0_1_clkreq";
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};
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};
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pcie1_pins: pcie1-pins {
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mux {
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function = "pcie";
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groups = "pcie1_pad_perst",
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"pcie1_0_waken",
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"pcie1_0_clkreq";
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};
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};
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pmic_bus_pins: pmic-bus-pins {
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mux {
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function = "pmic";
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groups = "pmic_bus";
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};
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};
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/* Serial NAND is shared pin with SPI-NOR */
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serial_nand_pins: serial-nand-pins {
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mux {
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function = "flash";
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groups = "snfi";
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};
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};
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uart0_pins: uart0-pins {
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mux {
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function = "uart";
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groups = "uart0_0_tx_rx";
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};
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};
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watchdog_pins: watchdog-pins {
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mux {
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function = "watchdog";
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groups = "watchdog";
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};
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};
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};
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&pwrap {
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_bus_pins>;
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status = "okay";
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};
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&rtc {
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status = "disabled";
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};
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&sata {
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status = "disabled";
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};
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&sata_phy {
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status = "disabled";
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};
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&slot0 {
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wmac1: mt7915@0,0 {
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reg = <0x0000 0 0 0 0>;
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ieee80211-freq-limit = <5000000 6000000>;
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mediatek,mtd-eeprom = <&factory 0x05000>;
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nvmem-cells = <&macaddr_odm 3>;
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nvmem-cell-names = "mac-address";
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};
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};
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&snfi {
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pinctrl-names = "default";
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pinctrl-0 = <&serial_nand_pins>;
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status = "okay";
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snand: flash@0 {
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compatible = "spi-nand";
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mediatek,bmt-table-size = <0x1000>;
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mediatek,bmt-v2;
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nand-ecc-engine = <&snfi>;
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reg = <0>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "Preloader";
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reg = <0x00000000 0x00080000>;
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read-only;
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};
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partition@80000 {
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label = "ATF";
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reg = <0x00080000 0x00040000>;
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read-only;
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};
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partition@C0000 {
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label = "Bootloader";
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reg = <0x000C0000 0x00080000>;
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read-only;
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};
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partition@140000 {
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label = "BootConfig";
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reg = <0x00140000 0x00040000>;
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};
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partition@180000 {
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label = "Odm";
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reg = <0x00180000 0x00040000>;
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read-only;
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odm_partition: nvmem-layout {
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compatible = "fixed-layout";
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};
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};
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config1: partition@1C0000 {
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compatible = "nvmem-cells";
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label = "Config1";
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reg = <0x001C0000 0x00080000>;
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read-only;
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};
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partition@240000 {
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label = "Config2";
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reg = <0x00240000 0x00080000>;
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read-only;
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};
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partition@2C0000 {
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label = "Kernel1";
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reg = <0x002C0000 0x02D00000>;
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compatible = "denx,fit";
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openwrt,cmdline-match = "boot_part=Kernel1";
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partition@0 {
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label = "kernel";
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reg = <0x00000000 0x00800000>;
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};
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partition@800000 {
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label = "ubi";
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reg = <0x00800000 0x02500000>;
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};
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};
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partition@2FC0000 {
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label = "Kernel2";
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reg = <0x02FC0000 0x02D00000>;
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compatible = "denx,fit";
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openwrt,cmdline-match = "boot_part=Kernel2";
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partition@0 {
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label = "kernel";
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reg = <0x00000000 0x00800000>;
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};
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partition@800000 {
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label = "ubi";
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reg = <0x00800000 0x02500000>;
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};
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};
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factory: partition@5CC0000 {
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label = "Factory";
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reg = <0x05CC0000 0x00100000>;
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read-only;
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};
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partition@5DC0000 {
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label = "Mydlink";
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reg = <0x05DC0000 0x00200000>;
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read-only;
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};
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partition@5FC0000 {
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label = "Storage";
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reg = <0x05FC0000 0x00300000>;
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read-only;
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};
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};
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};
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};
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&ssusb {
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status = "disabled";
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};
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&u3phy {
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status = "disabled";
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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status = "okay";
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};
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&watchdog {
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pinctrl-names = "default";
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pinctrl-0 = <&watchdog_pins>;
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status = "okay";
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};
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&wmac {
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pinctrl-names = "default";
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pinctrl-0 = <&epa_elna_pins>;
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mediatek,mtd-eeprom = <&factory 0x0000>;
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nvmem-cells = <&macaddr_odm 2>;
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nvmem-cell-names = "mac-address";
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status = "okay";
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};
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