46 lines
1.8 KiB
Diff
46 lines
1.8 KiB
Diff
From 6d74b9e6d3bb07f50b22b9ea047b84a83aba185c Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Thu, 17 Oct 2024 19:26:24 +0200
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Subject: [PATCH] clk: en7523: Fix wrong BUS clock for EN7581
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The Documentation for EN7581 had a typo and still referenced the EN7523
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BUS base source frequency. This was in conflict with a different page in
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the Documentration that state that the BUS runs at 300MHz (600MHz source with
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divisor set to 2) and the actual watchdog that tick at half the BUS
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clock (150MHz). This was verified with the watchdog by timing the
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seconds that the system takes to reboot (due too watchdog) and by
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operating on different values of the BUS divisor.
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The correct values for source of BUS clock are 600MHz and 540MHz.
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This was also confirmed by Airoha.
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Cc: stable@vger.kernel.org
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Fixes: 66bc47326ce2 ("clk: en7523: Add EN7581 support")
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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---
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drivers/clk/clk-en7523.c | 5 +++--
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1 file changed, 3 insertions(+), 2 deletions(-)
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--- a/drivers/clk/clk-en7523.c
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+++ b/drivers/clk/clk-en7523.c
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@@ -87,6 +87,7 @@ static const u32 slic_base[] = { 1000000
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static const u32 npu_base[] = { 333000000, 400000000, 500000000 };
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/* EN7581 */
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static const u32 emi7581_base[] = { 540000000, 480000000, 400000000, 300000000 };
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+static const u32 bus7581_base[] = { 600000000, 540000000 };
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static const u32 npu7581_base[] = { 800000000, 750000000, 720000000, 600000000 };
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static const u32 crypto_base[] = { 540000000, 480000000 };
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@@ -222,8 +223,8 @@ static const struct en_clk_desc en7581_b
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.base_reg = REG_BUS_CLK_DIV_SEL,
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.base_bits = 1,
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.base_shift = 8,
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- .base_values = bus_base,
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- .n_base_values = ARRAY_SIZE(bus_base),
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+ .base_values = bus7581_base,
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+ .n_base_values = ARRAY_SIZE(bus7581_base),
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.div_bits = 3,
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.div_shift = 0,
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