85 lines
2.7 KiB
Diff
85 lines
2.7 KiB
Diff
From a9eaf305017a5ebe73ab34e85bd5414055a88f29 Mon Sep 17 00:00:00 2001
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From: Lorenzo Bianconi <lorenzo@kernel.org>
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Date: Tue, 12 Nov 2024 01:08:54 +0100
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Subject: [PATCH 6/6] clk: en7523: map io region in a single block
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Map all clock-controller memory region in a single block.
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This patch does not introduce any backward incompatibility since the dts
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for EN7581 SoC is not upstream yet.
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Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
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Link: https://lore.kernel.org/r/20241112-clk-en7581-syscon-v2-7-8ada5e394ae4@kernel.org
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Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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---
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drivers/clk/clk-en7523.c | 32 +++++++++++++-------------------
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1 file changed, 13 insertions(+), 19 deletions(-)
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--- a/drivers/clk/clk-en7523.c
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+++ b/drivers/clk/clk-en7523.c
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@@ -39,8 +39,8 @@
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#define REG_PCIE_XSI1_SEL_MASK GENMASK(12, 11)
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#define REG_CRYPTO_CLKSRC2 0x20c
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-#define REG_RST_CTRL2 0x00
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-#define REG_RST_CTRL1 0x04
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+#define REG_RST_CTRL2 0x830
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+#define REG_RST_CTRL1 0x834
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struct en_clk_desc {
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int id;
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@@ -645,15 +645,9 @@ static const struct reset_control_ops en
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.status = en7523_reset_status,
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};
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-static int en7581_reset_register(struct platform_device *pdev)
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+static int en7581_reset_register(struct device *dev, void __iomem *base)
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{
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- struct device *dev = &pdev->dev;
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struct en_rst_data *rst_data;
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- void __iomem *base;
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-
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- base = devm_platform_ioremap_resource(pdev, 1);
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- if (IS_ERR(base))
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- return PTR_ERR(base);
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rst_data = devm_kzalloc(dev, sizeof(*rst_data), GFP_KERNEL);
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if (!rst_data)
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@@ -677,27 +671,27 @@ static int en7581_reset_register(struct
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static int en7581_clk_hw_init(struct platform_device *pdev,
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struct clk_hw_onecell_data *clk_data)
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{
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- void __iomem *np_base;
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struct regmap *map;
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+ void __iomem *base;
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u32 val;
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map = syscon_regmap_lookup_by_compatible("airoha,en7581-chip-scu");
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if (IS_ERR(map))
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return PTR_ERR(map);
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- np_base = devm_platform_ioremap_resource(pdev, 0);
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- if (IS_ERR(np_base))
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- return PTR_ERR(np_base);
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+ base = devm_platform_ioremap_resource(pdev, 0);
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+ if (IS_ERR(base))
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+ return PTR_ERR(base);
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- en7581_register_clocks(&pdev->dev, clk_data, map, np_base);
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+ en7581_register_clocks(&pdev->dev, clk_data, map, base);
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- val = readl(np_base + REG_NP_SCU_SSTR);
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+ val = readl(base + REG_NP_SCU_SSTR);
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val &= ~(REG_PCIE_XSI0_SEL_MASK | REG_PCIE_XSI1_SEL_MASK);
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- writel(val, np_base + REG_NP_SCU_SSTR);
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- val = readl(np_base + REG_NP_SCU_PCIC);
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- writel(val | 3, np_base + REG_NP_SCU_PCIC);
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+ writel(val, base + REG_NP_SCU_SSTR);
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+ val = readl(base + REG_NP_SCU_PCIC);
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+ writel(val | 3, base + REG_NP_SCU_PCIC);
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- return en7581_reset_register(pdev);
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+ return en7581_reset_register(&pdev->dev, base);
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}
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static int en7523_clk_probe(struct platform_device *pdev)
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