// SPDX-License-Identifier: GPL-2.0-or-later OR MIT #include "ar7100.dtsi" #include #include / { compatible = "dlink,dir-825-b1", "qca,ar7161"; model = "D-Link DIR825B1"; aliases { led-boot = &led_power_orange; led-failsafe = &led_power_orange; led-running = &led_power_blue; led-upgrade = &led_power_orange; }; leds { compatible = "gpio-leds"; usb { label = "blue:usb"; gpios = <&gpio 0 GPIO_ACTIVE_LOW>; trigger-sources = <&usb_ohci_port>, <&usb_ehci_port>; linux,default-trigger = "usbport"; }; led_power_orange: power_orange { label = "orange:power"; gpios = <&gpio 1 GPIO_ACTIVE_LOW>; default-state = "on"; }; led_power_blue: power_blue { label = "blue:power"; gpios = <&gpio 2 GPIO_ACTIVE_LOW>; }; wps { label = "blue:wps"; gpios = <&gpio 4 GPIO_ACTIVE_LOW>; }; planet_orange { label = "orange:planet"; gpios = <&gpio 6 GPIO_ACTIVE_LOW>; }; planet_blue { label = "blue:planet"; gpios = <&gpio 11 GPIO_ACTIVE_LOW>; }; }; ath9k-leds { compatible = "gpio-leds"; wlan2g { label = "blue:wlan2g"; gpios = <&ath9k0 5 GPIO_ACTIVE_LOW>; linux,default-trigger = "phy0tpt"; }; wlan5g { label = "blue:wlan5g"; gpios = <&ath9k1 5 GPIO_ACTIVE_LOW>; linux,default-trigger = "phy1tpt"; }; }; keys { compatible = "gpio-keys"; reset { label = "reset"; linux,code = ; gpios = <&gpio 3 GPIO_ACTIVE_LOW>; }; wps { label = "wps"; linux,code = ; gpios = <&gpio 8 GPIO_ACTIVE_LOW>; }; }; rtl8366s { compatible = "realtek,rtl8366s"; gpio-sda = <&gpio 5 GPIO_ACTIVE_HIGH>; gpio-sck = <&gpio 7 GPIO_ACTIVE_HIGH>; realtek,initvals = <0x06 0x0108>; mdio-bus { #address-cells = <1>; #size-cells = <0>; status = "okay"; phy4: ethernet-phy@4 { reg = <4>; phy-mode = "rgmii"; }; }; }; virtual_flash { compatible = "mtd-concat"; devices = <&fwconcat0 &fwconcat1>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { compatible = "denx,uimage"; label = "firmware"; reg = <0x0 0x0>; }; }; }; }; &usb1 { status = "okay"; }; &usb2 { status = "okay"; }; &usb_phy { status = "okay"; }; &pcie0 { status = "okay"; ath9k0: wifi@0,11 { compatible = "pci168c,0029"; reg = <0x8800 0 0 0 0>; nvmem-cells = <&macaddr_lan 0>, <&cal_art_1000>; nvmem-cell-names = "mac-address", "calibration"; #gpio-cells = <2>; gpio-controller; }; ath9k1: wifi@0,12 { compatible = "pci168c,0029"; reg = <0x9000 0 0 0 0>; nvmem-cells = <&macaddr_wan 1>, <&cal_art_5000>; nvmem-cell-names = "mac-address", "calibration"; #gpio-cells = <2>; gpio-controller; }; }; &spi { status = "okay"; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <25000000>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "u-boot"; reg = <0x000000 0x040000>; read-only; }; partition@40000 { label = "config"; reg = <0x040000 0x010000>; read-only; }; fwconcat0: partition@50000 { label = "fwconcat0"; reg = <0x050000 0x610000>; }; partition@660000 { label = "caldata"; reg = <0x660000 0x010000>; read-only; nvmem-layout { compatible = "fixed-layout"; #address-cells = <1>; #size-cells = <1>; cal_art_1000: cal@1000 { reg = <0x1000 0xeb8>; }; cal_art_5000: cal@5000 { reg = <0x5000 0xeb8>; }; macaddr_lan: macaddr@ffa0 { compatible = "mac-base"; reg = <0xffa0 0x11>; #nvmem-cell-cells = <1>; }; macaddr_wan: macaddr@ffb4 { compatible = "mac-base"; reg = <0xffb4 0x11>; #nvmem-cell-cells = <1>; }; }; }; fwconcat1: partition@670000 { label = "fwconcat1"; reg = <0x670000 0x190000>; }; }; }; }; ð0 { status = "okay"; pll-data = <0x11110000 0x00001099 0x00991099>; nvmem-cells = <&macaddr_lan 0>; nvmem-cell-names = "mac-address"; fixed-link { speed = <1000>; full-duplex; }; }; ð1 { status = "okay"; pll-data = <0x11110000 0x00001099 0x00991099>; nvmem-cells = <&macaddr_wan 0>; nvmem-cell-names = "mac-address"; phy-handle = <&phy4>; };