add 3.6 kernel support
Signed-off-by: Florian Fainelli <florian@openwrt.org> SVN-Revision: 34622
This commit is contained in:
Florian Fainelli
parent
17c76e5ca8
commit
ff6116cbdf
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@ -0,0 +1,194 @@
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CONFIG_ALIGNMENT_TRAP=y
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CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
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CONFIG_ARCH_EP93XX=y
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CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
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CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y
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CONFIG_ARCH_NR_GPIO=0
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CONFIG_ARCH_REQUIRE_GPIOLIB=y
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# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
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# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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CONFIG_ARCH_USES_GETTIMEOFFSET=y
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CONFIG_ARM=y
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CONFIG_ARM_AMBA=y
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# CONFIG_ARM_CPU_SUSPEND is not set
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CONFIG_ARM_L1_CACHE_SHIFT=5
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CONFIG_ARM_NR_BANKS=16
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CONFIG_ARM_PATCH_PHYS_VIRT=y
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# CONFIG_ARM_SP805_WATCHDOG is not set
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CONFIG_ARM_THUMB=y
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CONFIG_ARM_VIC=y
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CONFIG_ARM_VIC_NR=2
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# CONFIG_ARPD is not set
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# CONFIG_BLK_DEV_INITRD is not set
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# CONFIG_CACHE_L2X0 is not set
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CONFIG_CC_OPTIMIZE_FOR_SIZE=y
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CONFIG_CLKDEV_LOOKUP=y
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CONFIG_CMDLINE="console=ttyAM0,57600 init=/etc/preinit"
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CONFIG_CMDLINE_FROM_BOOTLOADER=y
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CONFIG_CONSOLE_TRANSLATIONS=y
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CONFIG_CPU_32v4T=y
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CONFIG_CPU_ABRT_EV4T=y
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CONFIG_CPU_ARM920T=y
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CONFIG_CPU_CACHE_V4WT=y
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CONFIG_CPU_CACHE_VIVT=y
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CONFIG_CPU_COPY_V4WB=y
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CONFIG_CPU_CP15=y
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CONFIG_CPU_CP15_MMU=y
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# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
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# CONFIG_CPU_ICACHE_DISABLE is not set
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CONFIG_CPU_PABRT_LEGACY=y
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CONFIG_CPU_TLB_V4WBI=y
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CONFIG_CPU_USE_DOMAINS=y
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CONFIG_CRC7=y
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CONFIG_CRC_ITU_T=y
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CONFIG_CRUNCH=y
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# CONFIG_DEBUG_USER is not set
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CONFIG_DUMMY_CONSOLE=y
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CONFIG_ELF_CORE=y
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# CONFIG_ENABLE_WARN_DEPRECATED is not set
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CONFIG_EP93XX_EARLY_UART1=y
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# CONFIG_EP93XX_EARLY_UART2 is not set
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# CONFIG_EP93XX_EARLY_UART3 is not set
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CONFIG_EP93XX_ETH=y
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# CONFIG_EP93XX_PWM is not set
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CONFIG_EP93XX_SDCE0_PHYS_OFFSET=y
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# CONFIG_EP93XX_SDCE1_PHYS_OFFSET is not set
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# CONFIG_EP93XX_SDCE2_PHYS_OFFSET is not set
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# CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET is not set
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# CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET is not set
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CONFIG_EP93XX_WATCHDOG=y
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CONFIG_FONTS=y
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# CONFIG_FONT_10x18 is not set
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# CONFIG_FONT_6x11 is not set
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# CONFIG_FONT_7x14 is not set
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CONFIG_FONT_8x16=y
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CONFIG_FONT_8x8=y
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# CONFIG_FONT_ACORN_8x8 is not set
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# CONFIG_FONT_MINI_4x6 is not set
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# CONFIG_FONT_PEARL_8x8 is not set
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# CONFIG_FONT_SUN12x22 is not set
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# CONFIG_FONT_SUN8x16 is not set
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CONFIG_FRAMEBUFFER_CONSOLE=y
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# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
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# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
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CONFIG_FRAME_POINTER=y
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# CONFIG_FW_LOADER is not set
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CONFIG_GENERIC_ATOMIC64=y
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CONFIG_GENERIC_BUG=y
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CONFIG_GENERIC_GPIO=y
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CONFIG_GENERIC_IRQ_SHOW=y
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CONFIG_GENERIC_PCI_IOMAP=y
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CONFIG_GPIOLIB=y
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CONFIG_GPIO_EP93XX=y
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CONFIG_GPIO_GENERIC=y
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# CONFIG_GPIO_PL061 is not set
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# CONFIG_HAMRADIO is not set
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CONFIG_HARDIRQS_SW_RESEND=y
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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CONFIG_HAS_IOPORT=y
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CONFIG_HAVE_AOUT=y
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CONFIG_HAVE_ARCH_KGDB=y
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CONFIG_HAVE_ARCH_PFN_VALID=y
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CONFIG_HAVE_CLK=y
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CONFIG_HAVE_C_RECORDMCOUNT=y
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CONFIG_HAVE_DMA_API_DEBUG=y
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CONFIG_HAVE_DYNAMIC_FTRACE=y
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CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
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CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
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CONFIG_HAVE_FUNCTION_TRACER=y
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CONFIG_HAVE_GENERIC_DMA_COHERENT=y
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CONFIG_HAVE_GENERIC_HARDIRQS=y
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CONFIG_HAVE_IRQ_WORK=y
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CONFIG_HAVE_KERNEL_GZIP=y
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CONFIG_HAVE_KERNEL_LZMA=y
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CONFIG_HAVE_KERNEL_LZO=y
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CONFIG_HAVE_KERNEL_XZ=y
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CONFIG_HAVE_LATENCYTOP_SUPPORT=y
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CONFIG_HAVE_MEMBLOCK=y
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CONFIG_HAVE_OPROFILE=y
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CONFIG_HAVE_PERF_EVENTS=y
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CONFIG_HAVE_PROC_CPU=y
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CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
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CONFIG_HAVE_SPARSE_IRQ=y
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CONFIG_HW_CONSOLE=y
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CONFIG_I2C=y
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CONFIG_I2C_ALGOBIT=y
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CONFIG_I2C_BOARDINFO=y
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CONFIG_I2C_CHARDEV=y
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CONFIG_IKCONFIG=y
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CONFIG_IKCONFIG_PROC=y
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CONFIG_INPUT=y
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# CONFIG_INPUT_MISC is not set
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CONFIG_INPUT_TOUCHSCREEN=y
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CONFIG_IRQ_DOMAIN=y
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CONFIG_KTIME_SCALAR=y
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CONFIG_LOGO=y
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CONFIG_LOGO_LINUX_CLUT224=y
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CONFIG_LOGO_LINUX_MONO=y
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CONFIG_LOGO_LINUX_VGA16=y
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CONFIG_LOG_BUF_SHIFT=16
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# CONFIG_MACH_EDB9302A is not set
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# CONFIG_MACH_EDB9307A is not set
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# CONFIG_MACH_EDB9315A is not set
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CONFIG_MACH_SIM_ONE=y
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# CONFIG_MACH_SNAPPER_CL15 is not set
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# CONFIG_MACH_VISION_EP9307 is not set
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# CONFIG_MFD_T7L66XB is not set
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CONFIG_MMC=y
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CONFIG_MMC_BLOCK=y
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CONFIG_MMC_SPI=y
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CONFIG_MODULE_FORCE_UNLOAD=y
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CONFIG_MTD_CFI_ADV_OPTIONS=y
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# CONFIG_MTD_CFI_GEOMETRY is not set
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CONFIG_MTD_CFI_STAA=y
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# CONFIG_MTD_COMPLEX_MAPPINGS is not set
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CONFIG_MTD_PHYSMAP=y
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CONFIG_MTD_RAM=y
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CONFIG_MULTI_IRQ_HANDLER=y
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CONFIG_NEED_DMA_MAP_STATE=y
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CONFIG_NEED_MACH_MEMORY_H=y
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CONFIG_NEED_PER_CPU_KM=y
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CONFIG_PAGEFLAGS_EXTENDED=y
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CONFIG_PAGE_OFFSET=0xC0000000
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# CONFIG_PCI_SYSCALL is not set
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CONFIG_PERF_USE_VMALLOC=y
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# CONFIG_PREEMPT_RCU is not set
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# CONFIG_SCSI_DMA is not set
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# CONFIG_SERIAL_8250 is not set
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CONFIG_SERIAL_AMBA_PL010=y
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CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
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# CONFIG_SERIAL_AMBA_PL011 is not set
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CONFIG_SPI=y
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CONFIG_SPI_BITBANG=y
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CONFIG_SPI_EP93XX=y
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CONFIG_SPI_MASTER=y
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CONFIG_SPLIT_PTLOCK_CPUS=999999
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CONFIG_SYS_SUPPORTS_APM_EMULATION=y
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# CONFIG_TCP_CONG_ADVANCED is not set
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# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
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# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set
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# CONFIG_TOUCHSCREEN_BU21013 is not set
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# CONFIG_TOUCHSCREEN_DYNAPRO is not set
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# CONFIG_TOUCHSCREEN_EGALAX is not set
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# CONFIG_TOUCHSCREEN_EP93XX is not set
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# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
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# CONFIG_TOUCHSCREEN_MAX11801 is not set
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# CONFIG_TOUCHSCREEN_PIXCIR is not set
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# CONFIG_TOUCHSCREEN_ST1232 is not set
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# CONFIG_TOUCHSCREEN_TSC2005 is not set
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# CONFIG_TOUCHSCREEN_TSC_SERIO is not set
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CONFIG_UID16=y
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# CONFIG_USB_ARCH_HAS_EHCI is not set
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# CONFIG_USB_ARCH_HAS_XHCI is not set
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CONFIG_USB_SUPPORT=y
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CONFIG_VECTORS_BASE=0xffff0000
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CONFIG_VIDEO_OUTPUT_CONTROL=y
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CONFIG_VM_EVENT_COUNTERS=y
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CONFIG_VT=y
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CONFIG_VT_CONSOLE=y
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# CONFIG_VT_HW_CONSOLE_BINDING is not set
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CONFIG_ZBOOT_ROM_BSS=0x0
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CONFIG_ZBOOT_ROM_TEXT=0x0
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CONFIG_ZONE_DMA_FLAG=0
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@ -0,0 +1,70 @@
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This patch puts the EP93xx chip revision and unique ID into /proc/cpuinfo.
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This is necessary to be able to set a unique MAC address for DHCP purposes
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by adding a line to /etc/network/interfaces:
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# Generate a unique locally-assigned MAC address from the CPU serial number
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pre-up ifconfig eth0 hw ether `sed -n 's/^Serial.* 000000/02/p' /proc/cpuinfo`
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It uses the chip revision reading code in the ep93xx-chip-revision patch.
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Really, this is wrong, since /proc/cpuinfo should report the revision and
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serial number of the ARM920T processor, while these are the rev and serial
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of the EP93xx SoC. In a future kernel (>2.6.34) there may be a new file
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/proc/socinfo for this information.
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-martinwguy 14 May 2010
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--- a/arch/arm/kernel/setup.c
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+++ b/arch/arm/kernel/setup.c
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@@ -56,6 +56,12 @@
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#include <asm/unwind.h>
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#include <asm/memblock.h>
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+#if defined(CONFIG_ARCH_EP93XX)
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+#include <asm/io.h>
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+#include <mach/platform.h>
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+#include <mach/ep93xx-regs.h>
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+#endif
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+
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#if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
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#include "compat.h"
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#endif
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@@ -1107,9 +1113,16 @@ static int c_show(struct seq_file *m, vo
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seq_puts(m, "\n");
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seq_printf(m, "Hardware\t: %s\n", machine_name);
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+#if defined(CONFIG_ARCH_EP93XX)
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+ seq_printf(m, "Revision\t: %04x\n",
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+ ep93xx_chip_revision());
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+ seq_printf(m, "Serial\t\t: %016x\n",
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+ *((unsigned int *)EP93XX_SECURITY_UNIQID));
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+#else
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seq_printf(m, "Revision\t: %04x\n", system_rev);
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seq_printf(m, "Serial\t\t: %08x%08x\n",
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system_serial_high, system_serial_low);
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+#endif
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return 0;
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}
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--- a/arch/arm/mach-ep93xx/soc.h
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+++ b/arch/arm/mach-ep93xx/soc.h
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@@ -82,8 +82,6 @@
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#define EP93XX_I2S_PHYS_BASE EP93XX_APB_PHYS(0x00020000)
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#define EP93XX_I2S_BASE EP93XX_APB_IOMEM(0x00020000)
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-#define EP93XX_SECURITY_BASE EP93XX_APB_IOMEM(0x00030000)
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-
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#define EP93XX_AAC_PHYS_BASE EP93XX_APB_PHYS(0x00080000)
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#define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000)
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--- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
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+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
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@@ -38,4 +38,8 @@
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#define EP93XX_UART3_PHYS_BASE EP93XX_APB_PHYS(0x000e0000)
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#define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000)
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+#define EP93XX_SECURITY_BASE EP93XX_APB_IOMEM(0x00030000)
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+#define EP93XX_SECURITY_REG(x) (EP93XX_SECURITY_BASE + (x))
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+#define EP93XX_SECURITY_UNIQID EP93XX_SECURITY_REG(0x2440)
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+
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#endif
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,180 @@
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This enables the mmc-over-spi driver for the Sim.One board, based on Mika's
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patch, which used a GPIO for chip select in stead of the default SFRMOUT pin.
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I've modified it to use the usual SFRMOUT; if you've modified your Sim.One
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board to use a GPIO instead, uncomment and modify
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// #define MMC_CHIP_SELECT_GPIO EP93XX_GPIO_LINE_EGPIO15
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in the source file.
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-martinwguy, 14 May 2010
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From: Mika Westerberg <mika.westerberg@iki.fi>
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Date: Wed, 28 Apr 2010 08:42:46 +0300
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Subject: [PATCH] ep93xx: simone: added board specific SPI support for MMC/SD cards
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This includes setting up EGPIOs 0 and 9 for card detection and chip select
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respectively.
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--- a/arch/arm/mach-ep93xx/simone.c
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+++ b/arch/arm/mach-ep93xx/simone.c
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@@ -18,12 +18,17 @@
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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+#include <linux/gpio.h>
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#include <linux/i2c.h>
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#include <linux/i2c-gpio.h>
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+#include <linux/mmc/host.h>
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+#include <linux/spi/spi.h>
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+#include <linux/spi/mmc_spi.h>
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#include <mach/hardware.h>
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#include <mach/fb.h>
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#include <mach/gpio-ep93xx.h>
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+#include <mach/ep93xx_spi.h>
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#include <asm/hardware/vic.h>
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#include <asm/mach-types.h>
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@@ -41,6 +46,135 @@ static struct ep93xxfb_mach_info __initd
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.flags = EP93XXFB_USE_SDCSN0 | EP93XXFB_PCLK_FALLING,
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};
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|
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+/*
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+ * GPIO lines used for MMC card detection.
|
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+ */
|
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+#define MMC_CARD_DETECT_GPIO EP93XX_GPIO_LINE_EGPIO0
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+
|
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+/*
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+ * If you have hacked your Sim.One to use a GPIO as SD card chip select
|
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+ * (SD pin 1), uncomment the following line.
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+ * The example, EGPIO15, is on TP17 near the CPU.
|
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+ */
|
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+// #define MMC_CHIP_SELECT_GPIO EP93XX_GPIO_LINE_EGPIO15
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+
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+/*
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+ * MMC SPI chip select GPIO handling. If you are using SFRMOUT (SFRM1) signal,
|
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+ * you can leave these empty and pass NULL as .controller_data.
|
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+ */
|
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+
|
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+#ifdef MMC_CHIP_SELECT_GPIO
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+static int simone_mmc_spi_setup(struct spi_device *spi)
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+{
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+ unsigned int gpio = MMC_CHIP_SELECT_GPIO;
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+ int err;
|
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+
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+ err = gpio_request(gpio, spi->modalias);
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+ if (err)
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+ return err;
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+
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+ err = gpio_direction_output(gpio, 1);
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+ if (err) {
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+ gpio_free(gpio);
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+ return err;
|
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+ }
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+
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+ return 0;
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+}
|
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+
|
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+static void simone_mmc_spi_cleanup(struct spi_device *spi)
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+{
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+ unsigned int gpio = MMC_CHIP_SELECT_GPIO;
|
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+
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+ gpio_set_value(gpio, 1);
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+ gpio_direction_input(gpio);
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+ gpio_free(gpio);
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+}
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+
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+static void simone_mmc_spi_cs_control(struct spi_device *spi, int value)
|
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+{
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+ gpio_set_value(MMC_CHIP_SELECT_GPIO, value);
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+}
|
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+
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+static struct ep93xx_spi_chip_ops simone_mmc_spi_ops = {
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+ .setup = simone_mmc_spi_setup,
|
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+ .cleanup = simone_mmc_spi_cleanup,
|
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+ .cs_control = simone_mmc_spi_cs_control,
|
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+};
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+#endif
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+
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+/*
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+ * MMC card detection GPIO setup.
|
||||
+ */
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+static int simone_mmc_spi_init(struct device *dev,
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+ irqreturn_t (*irq_handler)(int, void *), void *mmc)
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+{
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+ unsigned int gpio = MMC_CARD_DETECT_GPIO;
|
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+ int irq, err;
|
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+
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+ err = gpio_request(gpio, dev_name(dev));
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+ if (err)
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+ return err;
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+
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+ err = gpio_direction_input(gpio);
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+ if (err)
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+ goto fail;
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+
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+ irq = gpio_to_irq(gpio);
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+ if (irq < 0)
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+ goto fail;
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+
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+ err = request_irq(irq, irq_handler, IRQF_TRIGGER_FALLING,
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+ "MMC card detect", mmc);
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+ if (err)
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+ goto fail;
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+
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+ printk(KERN_INFO "%s: using irq %d for MMC card detection\n",
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+ dev_name(dev), irq);
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+
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+ return 0;
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+fail:
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+ gpio_free(gpio);
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+ return err;
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+}
|
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+
|
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+static void simone_mmc_spi_exit(struct device *dev, void *mmc)
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+{
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+ unsigned int gpio = MMC_CARD_DETECT_GPIO;
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||||
+
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+ free_irq(gpio_to_irq(gpio), mmc);
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+ gpio_free(gpio);
|
||||
+}
|
||||
+
|
||||
+static struct mmc_spi_platform_data simone_mmc_spi_data = {
|
||||
+ .init = simone_mmc_spi_init,
|
||||
+ .exit = simone_mmc_spi_exit,
|
||||
+ .detect_delay = 500,
|
||||
+ .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
|
||||
+};
|
||||
+
|
||||
+static struct spi_board_info simone_spi_devices[] __initdata = {
|
||||
+ {
|
||||
+ .modalias = "mmc_spi",
|
||||
+#ifdef MMC_CHIP_SELECT_GPIO
|
||||
+ .controller_data = &simone_mmc_spi_ops,
|
||||
+#endif
|
||||
+ .platform_data = &simone_mmc_spi_data,
|
||||
+ /*
|
||||
+ * We use 10 MHz even though the maximum is 3.7 MHz. The driver
|
||||
+ * will limit it automatically to max. frequency.
|
||||
+ */
|
||||
+ .max_speed_hz = 10 * 1000 * 1000,
|
||||
+ .bus_num = 0,
|
||||
+ .chip_select = 0,
|
||||
+ .mode = SPI_MODE_3,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static struct ep93xx_spi_info simone_spi_info __initdata = {
|
||||
+ .num_chipselect = ARRAY_SIZE(simone_spi_devices),
|
||||
+};
|
||||
+
|
||||
static struct i2c_gpio_platform_data __initdata simone_i2c_gpio_data = {
|
||||
.sda_pin = EP93XX_GPIO_LINE_EEDAT,
|
||||
.sda_is_open_drain = 0,
|
||||
@@ -75,6 +209,8 @@ static void __init simone_init_machine(v
|
||||
ep93xx_register_fb(&simone_fb_info);
|
||||
ep93xx_register_i2c(&simone_i2c_gpio_data, simone_i2c_board_info,
|
||||
ARRAY_SIZE(simone_i2c_board_info));
|
||||
+ ep93xx_register_spi(&simone_spi_info, simone_spi_devices,
|
||||
+ ARRAY_SIZE(simone_spi_devices));
|
||||
simone_register_audio();
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue