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mvebu: remove all ≤ 5.15-tagged patches
They're already upstream. Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
This commit is contained in:
Rui Salvaterra
parent
05cd4a59f0
commit
fb29b91c5b
@ -1,65 +0,0 @@
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From da57203dc7fd556fbb3f0ec7d7d7c0b0e893b386 Mon Sep 17 00:00:00 2001
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From: Tomasz Maciej Nowak <tmn505@gmail.com>
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Date: Tue, 10 Nov 2020 16:38:31 +0100
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Subject: [PATCH] arm64: dts: mcbin-singleshot: add heartbeat LED
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With board revision 1.3, SolidRun moved the power LED to the middle of
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the board. In old place of power LED a GPIO controllable heartbeat LED
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was added. This commit only touches Single Shot variant, since only this
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variant is all revision 1.3.
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Note:
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This is slightly modified patch. Some boards could be placed in an
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enclosure, so the LED18 is enabled by default, since that'll be the only
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visible indicator that the board is operating.
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Reported-by: Alexandra Alth <alexandra@alth.de>
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Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
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Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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---
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.../marvell/armada-8040-mcbin-singleshot.dts | 22 +++++++++++++++++++
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1 file changed, 22 insertions(+)
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--- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin-singleshot.dts
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+++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin-singleshot.dts
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@@ -5,6 +5,8 @@
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* Device Tree file for MACCHIATOBin Armada 8040 community board platform
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*/
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+#include <dt-bindings/leds/common.h>
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+
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#include "armada-8040-mcbin.dtsi"
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/ {
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@@ -12,6 +14,20 @@
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compatible = "marvell,armada8040-mcbin-singleshot",
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"marvell,armada8040-mcbin", "marvell,armada8040",
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"marvell,armada-ap806-quad", "marvell,armada-ap806";
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+
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+ leds {
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+ compatible = "gpio-leds";
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+ pinctrl-0 = <&cp0_led18_pins>;
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+ pinctrl-names = "default";
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+
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+ led18 {
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+ gpios = <&cp0_gpio2 1 GPIO_ACTIVE_LOW>;
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+ function = LED_FUNCTION_HEARTBEAT;
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+ color = <LED_COLOR_ID_GREEN>;
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+ linux,default-trigger = "heartbeat";
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+ default-state = "on";
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+ };
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+ };
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};
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&cp0_eth0 {
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@@ -27,3 +43,10 @@
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managed = "in-band-status";
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sfp = <&sfp_eth1>;
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};
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+
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+&cp0_pinctrl {
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+ cp0_led18_pins: led18-pins {
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+ marvell,pins = "mpp33";
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+ marvell,function = "gpio";
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+ };
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+};
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@ -1,74 +0,0 @@
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From 018b88eee1a2efda26ed2f09aab33ccdc40ef18f Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
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Date: Sun, 15 Nov 2020 14:59:17 +0100
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Subject: ARM: dts: turris-omnia: enable HW buffer management
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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The buffer manager is available on Turris Omnia but needs to be
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described in device-tree to be used.
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Signed-off-by: Marek Behún <kabel@kernel.org>
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Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
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Cc: linux-arm-kernel@lists.infradead.org
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Cc: Uwe Kleine-König <uwe@kleine-koenig.org>
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Cc: Jason Cooper <jason@lakedaemon.net>
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Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
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Cc: Andreas Färber <afaerber@suse.de>
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Cc: Andrew Lunn <andrew@lunn.ch>
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Cc: Rob Herring <robh+dt@kernel.org>
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Cc: devicetree@vger.kernel.org
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Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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---
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arch/arm/boot/dts/armada-385-turris-omnia.dts | 17 +++++++++++++++++
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1 file changed, 17 insertions(+)
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(limited to 'arch/arm/boot/dts/armada-385-turris-omnia.dts')
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--- a/arch/arm/boot/dts/armada-385-turris-omnia.dts
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+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts
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@@ -84,12 +84,23 @@
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};
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};
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+&bm {
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+ status = "okay";
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+};
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+
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+&bm_bppi {
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+ status = "okay";
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+};
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+
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/* Connected to 88E6176 switch, port 6 */
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ð0 {
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pinctrl-names = "default";
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pinctrl-0 = <&ge0_rgmii_pins>;
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status = "okay";
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phy-mode = "rgmii";
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+ buffer-manager = <&bm>;
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+ bm,pool-long = <0>;
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+ bm,pool-short = <3>;
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fixed-link {
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speed = <1000>;
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@@ -103,6 +114,9 @@
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pinctrl-0 = <&ge1_rgmii_pins>;
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status = "okay";
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phy-mode = "rgmii";
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+ buffer-manager = <&bm>;
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+ bm,pool-long = <1>;
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+ bm,pool-short = <3>;
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fixed-link {
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speed = <1000>;
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@@ -115,6 +129,9 @@
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status = "okay";
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phy-mode = "sgmii";
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phy = <&phy1>;
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+ buffer-manager = <&bm>;
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+ bm,pool-long = <2>;
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+ bm,pool-short = <3>;
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};
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&i2c0 {
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@ -1,37 +0,0 @@
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From 9ec25ef84832209a8326f9a71fe3ba14f4bcf301 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
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Date: Sun, 15 Nov 2020 14:59:18 +0100
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Subject: ARM: dts: turris-omnia: add comphy handle to eth2
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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The eth2 controller on Turris Omnia is connected to SerDes. For SFP to
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be able to switch between 1G and 2.5G modes the comphy link has to be
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defined.
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Signed-off-by: Marek Behún <kabel@kernel.org>
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Fixes: f3a6a9f3704a ("ARM: dts: add description for Armada 38x ...")
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Reviewed-by: Andreas Färber <afaerber@suse.de>
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Cc: linux-arm-kernel@lists.infradead.org
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Cc: Uwe Kleine-König <uwe@kleine-koenig.org>
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Cc: Jason Cooper <jason@lakedaemon.net>
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Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
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Cc: Rob Herring <robh+dt@kernel.org>
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Cc: devicetree@vger.kernel.org
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Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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---
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arch/arm/boot/dts/armada-385-turris-omnia.dts | 1 +
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1 file changed, 1 insertion(+)
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--- a/arch/arm/boot/dts/armada-385-turris-omnia.dts
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+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts
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@@ -129,6 +129,7 @@
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status = "okay";
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phy-mode = "sgmii";
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phy = <&phy1>;
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+ phys = <&comphy5 2>;
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buffer-manager = <&bm>;
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bm,pool-long = <2>;
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bm,pool-short = <3>;
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@ -1,61 +0,0 @@
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From d29b67c220caf5f4905e1f1576e71bcb6de4af9e Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
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Date: Sun, 15 Nov 2020 14:59:19 +0100
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Subject: ARM: dts: turris-omnia: describe switch interrupt
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Describe switch interrupt for Turris Omnia so that the CPU does not have
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to poll the switch. We also need to to set mpp45 pin to gpio function
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for this.
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Signed-off-by: Marek Behún <kabel@kernel.org>
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Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
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Cc: linux-arm-kernel@lists.infradead.org
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Cc: Uwe Kleine-König <uwe@kleine-koenig.org>
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Cc: Jason Cooper <jason@lakedaemon.net>
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Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
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Cc: Andreas Färber <afaerber@suse.de>
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Cc: Andrew Lunn <andrew@lunn.ch>
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Cc: Rob Herring <robh+dt@kernel.org>
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Cc: devicetree@vger.kernel.org
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Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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---
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arch/arm/boot/dts/armada-385-turris-omnia.dts | 12 +++++++++++-
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1 file changed, 11 insertions(+), 1 deletion(-)
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--- a/arch/arm/boot/dts/armada-385-turris-omnia.dts
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+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts
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@@ -261,13 +261,18 @@
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/* Switch MV88E6176 at address 0x10 */
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switch@10 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&swint_pins>;
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compatible = "marvell,mv88e6085";
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#address-cells = <1>;
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#size-cells = <0>;
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- dsa,member = <0 0>;
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+ dsa,member = <0 0>;
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reg = <0x10>;
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+ interrupt-parent = <&gpio1>;
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+ interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
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+
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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@@ -320,6 +325,11 @@
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marvell,function = "gpio";
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};
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+ swint_pins: swint-pins {
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+ marvell,pins = "mpp45";
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+ marvell,function = "gpio";
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+ };
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+
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spi0cs0_pins: spi0cs0-pins {
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marvell,pins = "mpp25";
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marvell,function = "spi0";
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@ -1,90 +0,0 @@
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From add2d65962977caf23ca2fa21a2457d31b636574 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
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Date: Mon, 16 Nov 2020 13:24:22 +0100
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Subject: ARM: dts: turris-omnia: add SFP node
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Turris Omnia has an SFP cage that, together with WAN PHY, is connected
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to eth2 SerDes via a SerDes multiplexor. When a SFP module is present,
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the multiplexor switches the SerDes signal from PHY to SFP.
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Describe the SFP cage, but leave it disabled. Until phylink has support
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for such configuration, we are leaving it to U-Boot to enable SFP and
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disable WAN PHY at boot time depending on whether a SFP module is
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present.
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Signed-off-by: Marek Behún <kabel@kernel.org>
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Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Cc: Russell King - ARM Linux admin <linux@armlinux.org.uk>
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Cc: linux-arm-kernel@lists.infradead.org
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Cc: Uwe Kleine-König <uwe@kleine-koenig.org>
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Cc: Jason Cooper <jason@lakedaemon.net>
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Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
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Cc: Andreas Färber <afaerber@suse.de>
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Cc: Rob Herring <robh+dt@kernel.org>
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Cc: devicetree@vger.kernel.org
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Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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---
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arch/arm/boot/dts/armada-385-turris-omnia.dts | 30 ++++++++++++++++++++++++++-
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1 file changed, 29 insertions(+), 1 deletion(-)
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--- a/arch/arm/boot/dts/armada-385-turris-omnia.dts
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+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts
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@@ -82,6 +82,24 @@
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};
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};
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};
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+
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+ sfp: sfp {
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+ compatible = "sff,sfp";
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+ i2c-bus = <&sfp_i2c>;
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+ tx-fault-gpios = <&pcawan 0 GPIO_ACTIVE_HIGH>;
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+ tx-disable-gpios = <&pcawan 1 GPIO_ACTIVE_HIGH>;
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+ rate-select0-gpios = <&pcawan 2 GPIO_ACTIVE_HIGH>;
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+ los-gpios = <&pcawan 3 GPIO_ACTIVE_HIGH>;
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+ mod-def0-gpios = <&pcawan 4 GPIO_ACTIVE_LOW>;
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+ maximum-power-milliwatt = <3000>;
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+
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+ /*
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+ * For now this has to be enabled at boot time by U-Boot when
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+ * a SFP module is present. Read more in the comment in the
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+ * eth2 node below.
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+ */
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+ status = "disabled";
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+ };
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};
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&bm {
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@@ -126,10 +144,20 @@
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/* WAN port */
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ð2 {
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+ /*
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+ * eth2 is connected via a multiplexor to both the SFP cage and to
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+ * ethernet-phy@1. The multiplexor switches the signal to SFP cage when
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+ * a SFP module is present, as determined by the mode-def0 GPIO.
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+ *
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+ * Until kernel supports this configuration properly, in case SFP module
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+ * is present, U-Boot has to enable the sfp node above, remove phy
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+ * handle and add managed = "in-band-status" property.
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+ */
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status = "okay";
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phy-mode = "sgmii";
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phy = <&phy1>;
|
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phys = <&comphy5 2>;
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+ sfp = <&sfp>;
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buffer-manager = <&bm>;
|
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bm,pool-long = <2>;
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bm,pool-short = <3>;
|
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@@ -195,7 +223,7 @@
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/* routed to PCIe2 connector (CN62A) */
|
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};
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- i2c@4 {
|
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+ sfp_i2c: i2c@4 {
|
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#address-cells = <1>;
|
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#size-cells = <0>;
|
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reg = <4>;
|
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@ -1,160 +0,0 @@
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From 91dd42d0e30fdbb250c61d1192af569f07e6ada4 Mon Sep 17 00:00:00 2001
|
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From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
|
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Date: Sun, 15 Nov 2020 14:59:21 +0100
|
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Subject: ARM: dts: turris-omnia: add LED controller node
|
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MIME-Version: 1.0
|
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
|
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|
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Linux now has incomplete support for the LED controller on Turris Omnia:
|
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it can set brightness and colors for each LED.
|
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|
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The controller can also put these LEDs into HW controlled mode, in which
|
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the LEDs are controlled by HW: for example the WAN LED is connected via
|
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MCU to the WAN PHY LED pin.
|
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|
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The driver does not support these HW controlled modes yet, and on probe
|
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puts the LEDs into SW controlled mode.
|
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|
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Add node describing the LED controller, but disable it for now.
|
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|
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Signed-off-by: Marek Behún <kabel@kernel.org>
|
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Cc: linux-arm-kernel@lists.infradead.org
|
||||
Cc: Uwe Kleine-König <uwe@kleine-koenig.org>
|
||||
Cc: Jason Cooper <jason@lakedaemon.net>
|
||||
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
|
||||
Cc: Andreas Färber <afaerber@suse.de>
|
||||
Cc: Rob Herring <robh+dt@kernel.org>
|
||||
Cc: devicetree@vger.kernel.org
|
||||
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
|
||||
---
|
||||
arch/arm/boot/dts/armada-385-turris-omnia.dts | 111 +++++++++++++++++++++++++-
|
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1 file changed, 110 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/arch/arm/boot/dts/armada-385-turris-omnia.dts
|
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+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts
|
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@@ -12,6 +12,7 @@
|
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|
||||
#include <dt-bindings/gpio/gpio.h>
|
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#include <dt-bindings/input/input.h>
|
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+#include <dt-bindings/leds/common.h>
|
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#include "armada-385.dtsi"
|
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/ {
|
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@@ -181,7 +182,115 @@
|
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reg = <0>;
|
||||
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/* STM32F0 command interface at address 0x2a */
|
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- /* leds device (in STM32F0) at address 0x2b */
|
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+
|
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+ led-controller@2b {
|
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+ compatible = "cznic,turris-omnia-leds";
|
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+ reg = <0x2b>;
|
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+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ /*
|
||||
+ * LEDs are controlled by MCU (STM32F0) at
|
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+ * address 0x2b.
|
||||
+ *
|
||||
+ * The driver does not support HW control mode
|
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+ * for the LEDs yet. Disable the LEDs for now.
|
||||
+ *
|
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+ * Also LED functions are not stable yet:
|
||||
+ * - there are 3 LEDs connected via MCU to PCIe
|
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+ * ports. One of these ports supports mSATA.
|
||||
+ * There is no mSATA nor PCIe function.
|
||||
+ * For now we use LED_FUNCTION_WLAN, since
|
||||
+ * in most cases users have wifi cards in
|
||||
+ * these slots
|
||||
+ * - there are 2 LEDs dedicated for user: A and
|
||||
+ * B. Again there is no such function defined.
|
||||
+ * For now we use LED_FUNCTION_INDICATOR
|
||||
+ */
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ multi-led@0 {
|
||||
+ reg = <0x0>;
|
||||
+ color = <LED_COLOR_ID_RGB>;
|
||||
+ function = LED_FUNCTION_INDICATOR;
|
||||
+ function-enumerator = <2>;
|
||||
+ };
|
||||
+
|
||||
+ multi-led@1 {
|
||||
+ reg = <0x1>;
|
||||
+ color = <LED_COLOR_ID_RGB>;
|
||||
+ function = LED_FUNCTION_INDICATOR;
|
||||
+ function-enumerator = <1>;
|
||||
+ };
|
||||
+
|
||||
+ multi-led@2 {
|
||||
+ reg = <0x2>;
|
||||
+ color = <LED_COLOR_ID_RGB>;
|
||||
+ function = LED_FUNCTION_WLAN;
|
||||
+ function-enumerator = <3>;
|
||||
+ };
|
||||
+
|
||||
+ multi-led@3 {
|
||||
+ reg = <0x3>;
|
||||
+ color = <LED_COLOR_ID_RGB>;
|
||||
+ function = LED_FUNCTION_WLAN;
|
||||
+ function-enumerator = <2>;
|
||||
+ };
|
||||
+
|
||||
+ multi-led@4 {
|
||||
+ reg = <0x4>;
|
||||
+ color = <LED_COLOR_ID_RGB>;
|
||||
+ function = LED_FUNCTION_WLAN;
|
||||
+ function-enumerator = <1>;
|
||||
+ };
|
||||
+
|
||||
+ multi-led@5 {
|
||||
+ reg = <0x5>;
|
||||
+ color = <LED_COLOR_ID_RGB>;
|
||||
+ function = LED_FUNCTION_WAN;
|
||||
+ };
|
||||
+
|
||||
+ multi-led@6 {
|
||||
+ reg = <0x6>;
|
||||
+ color = <LED_COLOR_ID_RGB>;
|
||||
+ function = LED_FUNCTION_LAN;
|
||||
+ function-enumerator = <4>;
|
||||
+ };
|
||||
+
|
||||
+ multi-led@7 {
|
||||
+ reg = <0x7>;
|
||||
+ color = <LED_COLOR_ID_RGB>;
|
||||
+ function = LED_FUNCTION_LAN;
|
||||
+ function-enumerator = <3>;
|
||||
+ };
|
||||
+
|
||||
+ multi-led@8 {
|
||||
+ reg = <0x8>;
|
||||
+ color = <LED_COLOR_ID_RGB>;
|
||||
+ function = LED_FUNCTION_LAN;
|
||||
+ function-enumerator = <2>;
|
||||
+ };
|
||||
+
|
||||
+ multi-led@9 {
|
||||
+ reg = <0x9>;
|
||||
+ color = <LED_COLOR_ID_RGB>;
|
||||
+ function = LED_FUNCTION_LAN;
|
||||
+ function-enumerator = <1>;
|
||||
+ };
|
||||
+
|
||||
+ multi-led@a {
|
||||
+ reg = <0xa>;
|
||||
+ color = <LED_COLOR_ID_RGB>;
|
||||
+ function = LED_FUNCTION_LAN;
|
||||
+ function-enumerator = <0>;
|
||||
+ };
|
||||
+
|
||||
+ multi-led@b {
|
||||
+ reg = <0xb>;
|
||||
+ color = <LED_COLOR_ID_RGB>;
|
||||
+ function = LED_FUNCTION_POWER;
|
||||
+ };
|
||||
+ };
|
||||
|
||||
eeprom@54 {
|
||||
compatible = "atmel,24c64";
|
||||
@ -1,52 +0,0 @@
|
||||
From 8ee4a5f4f40da60bb85e13d9dd218a3c9197e3e3 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
|
||||
Date: Sun, 15 Nov 2020 14:59:22 +0100
|
||||
Subject: ARM: dts: turris-omnia: update ethernet-phy node and handle name
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
Use property name `phy-handle` instead of the deprecated `phy` to
|
||||
connect eth2 to the PHY.
|
||||
Rename the node from "phy@1" to "ethernet-phy@1", since "phy@1" is
|
||||
incorrect according to device-tree bindings documentation.
|
||||
Also remove the "ethernet-phy-id0141.0DD1" compatible string, it is not
|
||||
needed. Kernel can read the PHY identifier itself.
|
||||
|
||||
Signed-off-by: Marek Behún <kabel@kernel.org>
|
||||
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
|
||||
Cc: linux-arm-kernel@lists.infradead.org
|
||||
Cc: Uwe Kleine-König <uwe@kleine-koenig.org>
|
||||
Cc: Jason Cooper <jason@lakedaemon.net>
|
||||
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
|
||||
Cc: Andreas Färber <afaerber@suse.de>
|
||||
Cc: Rob Herring <robh+dt@kernel.org>
|
||||
Cc: devicetree@vger.kernel.org
|
||||
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
|
||||
---
|
||||
arch/arm/boot/dts/armada-385-turris-omnia.dts | 6 +++---
|
||||
1 file changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
--- a/arch/arm/boot/dts/armada-385-turris-omnia.dts
|
||||
+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts
|
||||
@@ -156,7 +156,7 @@
|
||||
*/
|
||||
status = "okay";
|
||||
phy-mode = "sgmii";
|
||||
- phy = <&phy1>;
|
||||
+ phy-handle = <&phy1>;
|
||||
phys = <&comphy5 2>;
|
||||
sfp = <&sfp>;
|
||||
buffer-manager = <&bm>;
|
||||
@@ -387,9 +387,9 @@
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
status = "okay";
|
||||
|
||||
- phy1: phy@1 {
|
||||
+ phy1: ethernet-phy@1 {
|
||||
status = "okay";
|
||||
- compatible = "ethernet-phy-id0141.0DD1", "ethernet-phy-ieee802.3-c22";
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
marvell,reg-init = <3 18 0 0x4985>;
|
||||
|
||||
@ -1,33 +0,0 @@
|
||||
From 5b2c7e0ae762fff2b172caf16b2766cc3e1ad859 Mon Sep 17 00:00:00 2001
|
||||
From: Rui Salvaterra <rsalvaterra@gmail.com>
|
||||
Date: Wed, 17 Feb 2021 15:30:38 +0000
|
||||
Subject: ARM: dts: turris-omnia: fix hardware buffer management
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
Hardware buffer management has never worked on the Turris Omnia, as the
|
||||
required MBus window hadn't been reserved. Fix thusly.
|
||||
|
||||
Fixes: 018b88eee1a2 ("ARM: dts: turris-omnia: enable HW buffer management")
|
||||
|
||||
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
|
||||
Reviewed-by: Marek Behún <kabel@kernel.org>
|
||||
Tested-by: Klaus Kudielka <klaus.kudielka@gmail.com>
|
||||
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
|
||||
---
|
||||
arch/arm/boot/dts/armada-385-turris-omnia.dts | 3 ++-
|
||||
1 file changed, 2 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/arch/arm/boot/dts/armada-385-turris-omnia.dts
|
||||
+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts
|
||||
@@ -32,7 +32,8 @@
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
||||
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
|
||||
- MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
|
||||
+ MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
|
||||
+ MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
|
||||
|
||||
internal-regs {
|
||||
|
||||
@ -1,109 +0,0 @@
|
||||
From 4906887a8ae5f1296f8079bcf4565a6092a8e402 Mon Sep 17 00:00:00 2001
|
||||
From: Maxime Chevallier <maxime.chevallier@bootlin.com>
|
||||
Date: Tue, 16 Feb 2021 10:25:36 +0100
|
||||
Subject: net: mvneta: Implement mqprio support
|
||||
|
||||
Implement a basic MQPrio support, inserting rules in RX that translate
|
||||
the TC to prio mapping into vlan prio to queues.
|
||||
|
||||
The TX logic stays the same as when we don't offload the qdisc.
|
||||
|
||||
Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
drivers/net/ethernet/marvell/mvneta.c | 61 +++++++++++++++++++++++++++++++++++
|
||||
1 file changed, 61 insertions(+)
|
||||
|
||||
(limited to 'drivers/net/ethernet/marvell/mvneta.c')
|
||||
|
||||
--- a/drivers/net/ethernet/marvell/mvneta.c
|
||||
+++ b/drivers/net/ethernet/marvell/mvneta.c
|
||||
@@ -102,6 +102,8 @@
|
||||
#define MVNETA_TX_NO_DATA_SWAP BIT(5)
|
||||
#define MVNETA_DESC_SWAP BIT(6)
|
||||
#define MVNETA_TX_BRST_SZ_MASK(burst) ((burst) << 22)
|
||||
+#define MVNETA_VLAN_PRIO_TO_RXQ 0x2440
|
||||
+#define MVNETA_VLAN_PRIO_RXQ_MAP(prio, rxq) ((rxq) << ((prio) * 3))
|
||||
#define MVNETA_PORT_STATUS 0x2444
|
||||
#define MVNETA_TX_IN_PRGRS BIT(0)
|
||||
#define MVNETA_TX_FIFO_EMPTY BIT(8)
|
||||
@@ -490,6 +492,7 @@ struct mvneta_port {
|
||||
u8 mcast_count[256];
|
||||
u16 tx_ring_size;
|
||||
u16 rx_ring_size;
|
||||
+ u8 prio_tc_map[8];
|
||||
|
||||
phy_interface_t phy_interface;
|
||||
struct device_node *dn;
|
||||
@@ -4913,6 +4916,63 @@ static u16 mvneta_select_queue(struct ne
|
||||
}
|
||||
#endif
|
||||
|
||||
+static void mvneta_clear_rx_prio_map(struct mvneta_port *pp)
|
||||
+{
|
||||
+ mvreg_write(pp, MVNETA_VLAN_PRIO_TO_RXQ, 0);
|
||||
+}
|
||||
+
|
||||
+static void mvneta_setup_rx_prio_map(struct mvneta_port *pp)
|
||||
+{
|
||||
+ u32 val = 0;
|
||||
+ int i;
|
||||
+
|
||||
+ for (i = 0; i < rxq_number; i++)
|
||||
+ val |= MVNETA_VLAN_PRIO_RXQ_MAP(i, pp->prio_tc_map[i]);
|
||||
+
|
||||
+ mvreg_write(pp, MVNETA_VLAN_PRIO_TO_RXQ, val);
|
||||
+}
|
||||
+
|
||||
+static int mvneta_setup_mqprio(struct net_device *dev,
|
||||
+ struct tc_mqprio_qopt *qopt)
|
||||
+{
|
||||
+ struct mvneta_port *pp = netdev_priv(dev);
|
||||
+ u8 num_tc;
|
||||
+ int i;
|
||||
+
|
||||
+ qopt->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
|
||||
+ num_tc = qopt->num_tc;
|
||||
+
|
||||
+ if (num_tc > rxq_number)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ if (!num_tc) {
|
||||
+ mvneta_clear_rx_prio_map(pp);
|
||||
+ netdev_reset_tc(dev);
|
||||
+ return 0;
|
||||
+ }
|
||||
+
|
||||
+ memcpy(pp->prio_tc_map, qopt->prio_tc_map, sizeof(pp->prio_tc_map));
|
||||
+
|
||||
+ mvneta_setup_rx_prio_map(pp);
|
||||
+
|
||||
+ netdev_set_num_tc(dev, qopt->num_tc);
|
||||
+ for (i = 0; i < qopt->num_tc; i++)
|
||||
+ netdev_set_tc_queue(dev, i, qopt->count[i], qopt->offset[i]);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int mvneta_setup_tc(struct net_device *dev, enum tc_setup_type type,
|
||||
+ void *type_data)
|
||||
+{
|
||||
+ switch (type) {
|
||||
+ case TC_SETUP_QDISC_MQPRIO:
|
||||
+ return mvneta_setup_mqprio(dev, type_data);
|
||||
+ default:
|
||||
+ return -EOPNOTSUPP;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
static const struct net_device_ops mvneta_netdev_ops = {
|
||||
.ndo_open = mvneta_open,
|
||||
.ndo_stop = mvneta_stop,
|
||||
@@ -4928,6 +4988,7 @@ static const struct net_device_ops mvnet
|
||||
#endif
|
||||
.ndo_bpf = mvneta_xdp,
|
||||
.ndo_xdp_xmit = mvneta_xdp_xmit,
|
||||
+ .ndo_setup_tc = mvneta_setup_tc,
|
||||
};
|
||||
|
||||
static const struct ethtool_ops mvneta_eth_tool_ops = {
|
||||
Loading…
Reference in New Issue
Block a user