mirror of
git://git.openwrt.org/openwrt/openwrt.git
synced 2024-12-24 15:43:25 +00:00
tegra: copy patches and config for kernel 5.15
Simple copy to better illustrate the forthcoming changes. Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
This commit is contained in:
Tomasz Maciej Nowak
Petr Štetiar
parent
2f50c53f17
commit
f8cd56def6
484
target/linux/tegra/config-5.15
Normal file
484
target/linux/tegra/config-5.15
Normal file
@ -0,0 +1,484 @@
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CONFIG_AC97_BUS=y
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# CONFIG_AHCI_TEGRA is not set
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CONFIG_ALIGNMENT_TRAP=y
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CONFIG_ARCH_32BIT_OFF_T=y
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CONFIG_ARCH_HIBERNATION_POSSIBLE=y
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CONFIG_ARCH_KEEP_MEMBLOCK=y
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CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
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CONFIG_ARCH_MULTIPLATFORM=y
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CONFIG_ARCH_MULTI_V6_V7=y
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CONFIG_ARCH_MULTI_V7=y
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CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED=y
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CONFIG_ARCH_NR_GPIO=1024
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CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
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CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
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CONFIG_ARCH_SELECT_MEMORY_MODEL=y
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CONFIG_ARCH_SPARSEMEM_ENABLE=y
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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CONFIG_ARCH_TEGRA=y
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# CONFIG_ARCH_TEGRA_114_SOC is not set
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# CONFIG_ARCH_TEGRA_124_SOC is not set
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CONFIG_ARCH_TEGRA_2x_SOC=y
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# CONFIG_ARCH_TEGRA_3x_SOC is not set
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CONFIG_ARM=y
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CONFIG_ARM_AMBA=y
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CONFIG_ARM_CPU_SUSPEND=y
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CONFIG_ARM_CRYPTO=y
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CONFIG_ARM_ERRATA_720789=y
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CONFIG_ARM_ERRATA_754327=y
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CONFIG_ARM_ERRATA_764369=y
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CONFIG_ARM_GIC=y
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CONFIG_ARM_HAS_SG_CHAIN=y
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CONFIG_ARM_HEAVY_MB=y
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CONFIG_ARM_L1_CACHE_SHIFT=6
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CONFIG_ARM_L1_CACHE_SHIFT_6=y
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CONFIG_ARM_PATCH_IDIV=y
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CONFIG_ARM_PATCH_PHYS_VIRT=y
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# CONFIG_ARM_PL172_MPMC is not set
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# CONFIG_ARM_SMMU is not set
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CONFIG_ARM_TEGRA_CPUIDLE=y
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CONFIG_ARM_THUMB=y
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CONFIG_ARM_THUMBEE=y
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CONFIG_ARM_UNWIND=y
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CONFIG_ARM_VIRT_EXT=y
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CONFIG_ASN1=y
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CONFIG_ATA=y
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CONFIG_ATAGS=y
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CONFIG_AUTO_ZRELADDR=y
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CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
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CONFIG_BLK_DEV_BSG=y
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CONFIG_BLK_DEV_LOOP=y
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CONFIG_BLK_MQ_PCI=y
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CONFIG_BLK_PM=y
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CONFIG_BLK_SCSI_REQUEST=y
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CONFIG_BOUNCE=y
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CONFIG_CACHE_L2X0=y
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CONFIG_CLKDEV_LOOKUP=y
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CONFIG_CLKSRC_MMIO=y
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CONFIG_CLONE_BACKWARDS=y
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CONFIG_CLZ_TAB=y
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CONFIG_CMA=y
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CONFIG_CMA_ALIGNMENT=8
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CONFIG_CMA_AREAS=7
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# CONFIG_CMA_DEBUG is not set
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# CONFIG_CMA_DEBUGFS is not set
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CONFIG_CMA_SIZE_MBYTES=16
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# CONFIG_CMA_SIZE_SEL_MAX is not set
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CONFIG_CMA_SIZE_SEL_MBYTES=y
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# CONFIG_CMA_SIZE_SEL_MIN is not set
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# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
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CONFIG_COMMON_CLK=y
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CONFIG_COMPAT_32BIT_TIME=y
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CONFIG_CONTIG_ALLOC=y
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# CONFIG_CPUFREQ_DT is not set
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CONFIG_CPU_32v6K=y
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CONFIG_CPU_32v7=y
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CONFIG_CPU_ABRT_EV7=y
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CONFIG_CPU_CACHE_V7=y
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CONFIG_CPU_CACHE_VIPT=y
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CONFIG_CPU_COPY_V6=y
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CONFIG_CPU_CP15=y
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CONFIG_CPU_CP15_MMU=y
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CONFIG_CPU_FREQ=y
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CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
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# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
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CONFIG_CPU_FREQ_GOV_ATTR_SET=y
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CONFIG_CPU_FREQ_GOV_COMMON=y
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CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
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CONFIG_CPU_FREQ_GOV_ONDEMAND=y
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CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
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CONFIG_CPU_FREQ_GOV_POWERSAVE=y
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CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
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CONFIG_CPU_FREQ_GOV_USERSPACE=y
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# CONFIG_CPU_FREQ_STAT is not set
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CONFIG_CPU_HAS_ASID=y
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CONFIG_CPU_IDLE=y
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CONFIG_CPU_IDLE_GOV_LADDER=y
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CONFIG_CPU_PABRT_V7=y
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CONFIG_CPU_PM=y
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CONFIG_CPU_RMAP=y
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CONFIG_CPU_SPECTRE=y
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CONFIG_CPU_THUMB_CAPABLE=y
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CONFIG_CPU_TLB_V7=y
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CONFIG_CPU_V7=y
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CONFIG_CRC16=y
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# CONFIG_CRC32_SARWATE is not set
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CONFIG_CRC32_SLICEBY8=y
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CONFIG_CROSS_MEMORY_ATTACH=y
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CONFIG_CRYPTO_ACOMP2=y
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CONFIG_CRYPTO_AES_ARM=y
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CONFIG_CRYPTO_AKCIPHER=y
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CONFIG_CRYPTO_AKCIPHER2=y
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CONFIG_CRYPTO_BLAKE2S=y
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CONFIG_CRYPTO_CRC32=y
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CONFIG_CRYPTO_CRC32C=y
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CONFIG_CRYPTO_CRYPTD=y
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CONFIG_CRYPTO_DEFLATE=y
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CONFIG_CRYPTO_DRBG=y
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CONFIG_CRYPTO_DRBG_HMAC=y
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CONFIG_CRYPTO_DRBG_MENU=y
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CONFIG_CRYPTO_ECHAINIV=y
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CONFIG_CRYPTO_HMAC=y
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CONFIG_CRYPTO_JITTERENTROPY=y
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CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
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CONFIG_CRYPTO_LIB_SHA256=y
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CONFIG_CRYPTO_LZ4=y
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CONFIG_CRYPTO_LZ4HC=y
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CONFIG_CRYPTO_LZO=y
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CONFIG_CRYPTO_NULL=y
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CONFIG_CRYPTO_RNG=y
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CONFIG_CRYPTO_RNG2=y
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CONFIG_CRYPTO_RNG_DEFAULT=y
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CONFIG_CRYPTO_RSA=y
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CONFIG_CRYPTO_SEQIV=y
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CONFIG_CRYPTO_SHA1=y
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CONFIG_CRYPTO_SHA1_ARM=y
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CONFIG_CRYPTO_SHA256=y
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CONFIG_CRYPTO_SHA256_ARM=y
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CONFIG_CRYPTO_SHA512_ARM=y
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CONFIG_CRYPTO_TWOFISH=y
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CONFIG_CRYPTO_TWOFISH_COMMON=y
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CONFIG_DCACHE_WORD_ACCESS=y
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CONFIG_DEBUG_ALIGN_RODATA=y
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CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
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# CONFIG_DEVPORT is not set
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CONFIG_DMADEVICES=y
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CONFIG_DMA_CMA=y
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CONFIG_DMA_ENGINE=y
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CONFIG_DMA_OF=y
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CONFIG_DMA_OPS=y
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CONFIG_DMA_REMAP=y
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CONFIG_DMA_SHARED_BUFFER=y
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CONFIG_DNOTIFY=y
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CONFIG_DRM=y
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CONFIG_DRM_BRIDGE=y
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CONFIG_DRM_FBDEV_EMULATION=y
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CONFIG_DRM_FBDEV_OVERALLOC=100
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CONFIG_DRM_KMS_FB_HELPER=y
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CONFIG_DRM_KMS_HELPER=y
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CONFIG_DRM_MIPI_DSI=y
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CONFIG_DRM_PANEL=y
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CONFIG_DRM_PANEL_BRIDGE=y
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CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
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CONFIG_DRM_TEGRA=y
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# CONFIG_DRM_TEGRA_DEBUG is not set
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# CONFIG_DRM_TEGRA_STAGING is not set
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CONFIG_DTC=y
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CONFIG_EDAC_ATOMIC_SCRUB=y
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CONFIG_EDAC_SUPPORT=y
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CONFIG_ENABLE_MUST_CHECK=y
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CONFIG_EXT4_FS=y
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CONFIG_EXTCON=y
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CONFIG_F2FS_FS=y
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CONFIG_FB=y
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CONFIG_FB_CFB_COPYAREA=y
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CONFIG_FB_CFB_FILLRECT=y
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CONFIG_FB_CFB_IMAGEBLIT=y
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CONFIG_FB_CMDLINE=y
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CONFIG_FB_DEFERRED_IO=y
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CONFIG_FB_SYS_COPYAREA=y
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CONFIG_FB_SYS_FILLRECT=y
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CONFIG_FB_SYS_FOPS=y
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CONFIG_FB_SYS_IMAGEBLIT=y
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CONFIG_FIX_EARLYCON_MEM=y
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CONFIG_FREEZER=y
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CONFIG_FS_IOMAP=y
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CONFIG_FS_MBCACHE=y
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# CONFIG_FW_CACHE is not set
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CONFIG_FW_LOADER_PAGED_BUF=y
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CONFIG_GENERIC_ALLOCATOR=y
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CONFIG_GENERIC_ARCH_TOPOLOGY=y
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CONFIG_GENERIC_BUG=y
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
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CONFIG_GENERIC_CPU_AUTOPROBE=y
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CONFIG_GENERIC_EARLY_IOREMAP=y
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CONFIG_GENERIC_GETTIMEOFDAY=y
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CONFIG_GENERIC_IDLE_POLL_SETUP=y
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CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
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CONFIG_GENERIC_IRQ_MIGRATION=y
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CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
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CONFIG_GENERIC_IRQ_SHOW=y
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CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
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CONFIG_GENERIC_MSI_IRQ=y
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CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
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CONFIG_GENERIC_PCI_IOMAP=y
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CONFIG_GENERIC_PHY=y
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CONFIG_GENERIC_PINCONF=y
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CONFIG_GENERIC_PINCTRL_GROUPS=y
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CONFIG_GENERIC_PINMUX_FUNCTIONS=y
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CONFIG_GENERIC_SCHED_CLOCK=y
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CONFIG_GENERIC_SMP_IDLE_THREAD=y
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CONFIG_GENERIC_STRNCPY_FROM_USER=y
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CONFIG_GENERIC_STRNLEN_USER=y
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CONFIG_GENERIC_TIME_VSYSCALL=y
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CONFIG_GENERIC_VDSO_32=y
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CONFIG_GLOB=y
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CONFIG_GPIO_TEGRA=y
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CONFIG_HANDLE_DOMAIN_IRQ=y
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CONFIG_HARDEN_BRANCH_PREDICTOR=y
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CONFIG_HARDIRQS_SW_RESEND=y
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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CONFIG_HAS_IOPORT_MAP=y
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CONFIG_HAVE_SMP=y
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CONFIG_HDMI=y
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CONFIG_HID=y
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CONFIG_HIDRAW=y
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CONFIG_HID_GENERIC=y
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CONFIG_HIGHMEM=y
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CONFIG_HIGHPTE=y
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CONFIG_HOTPLUG_CPU=y
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CONFIG_HWMON=y
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CONFIG_HZ_FIXED=0
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CONFIG_HZ_PERIODIC=y
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CONFIG_I2C=y
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CONFIG_I2C_ALGOBIT=y
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CONFIG_I2C_BOARDINFO=y
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CONFIG_I2C_COMPAT=y
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CONFIG_I2C_TEGRA=y
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CONFIG_INITRAMFS_SOURCE=""
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CONFIG_INPUT=y
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CONFIG_INPUT_KEYBOARD=y
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CONFIG_IOMMU_API=y
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# CONFIG_IOMMU_DEBUGFS is not set
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# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set
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CONFIG_IOMMU_IOVA=y
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# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
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# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
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CONFIG_IOMMU_SUPPORT=y
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CONFIG_IRQCHIP=y
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CONFIG_IRQ_DOMAIN=y
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CONFIG_IRQ_DOMAIN_HIERARCHY=y
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CONFIG_IRQ_FORCED_THREADING=y
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CONFIG_IRQ_WORK=y
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CONFIG_JBD2=y
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CONFIG_KCMP=y
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CONFIG_KEYBOARD_ATKBD=y
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CONFIG_LIBFDT=y
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CONFIG_LOCK_DEBUGGING_SUPPORT=y
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CONFIG_LOCK_SPIN_ON_OWNER=y
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CONFIG_LZ4HC_COMPRESS=y
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CONFIG_LZ4_COMPRESS=y
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CONFIG_LZ4_DECOMPRESS=y
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CONFIG_LZO_COMPRESS=y
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CONFIG_LZO_DECOMPRESS=y
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CONFIG_MEMFD_CREATE=y
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CONFIG_MEMORY=y
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CONFIG_MEMORY_ISOLATION=y
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# CONFIG_MFD_NVEC is not set
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CONFIG_MIGHT_HAVE_CACHE_L2X0=y
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CONFIG_MIGRATION=y
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CONFIG_MMC=y
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CONFIG_MMC_BLOCK=y
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CONFIG_MMC_CQHCI=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_IO_ACCESSORS=y
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# CONFIG_MMC_SDHCI_PCI is not set
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CONFIG_MMC_SDHCI_PLTFM=y
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CONFIG_MMC_SDHCI_TEGRA=y
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CONFIG_MODULES_USE_ELF_REL=y
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CONFIG_MPILIB=y
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CONFIG_MTD_SPI_NOR=y
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CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
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CONFIG_MUTEX_SPIN_ON_OWNER=y
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CONFIG_NEED_DMA_MAP_STATE=y
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# CONFIG_NEON is not set
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CONFIG_NET_FLOW_LIMIT=y
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CONFIG_NLS=y
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CONFIG_NR_CPUS=4
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CONFIG_NVMEM=y
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CONFIG_OF=y
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CONFIG_OF_ADDRESS=y
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CONFIG_OF_EARLY_FLATTREE=y
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CONFIG_OF_FLATTREE=y
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CONFIG_OF_GPIO=y
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CONFIG_OF_IOMMU=y
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CONFIG_OF_IRQ=y
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CONFIG_OF_KOBJ=y
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CONFIG_OF_NET=y
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CONFIG_OLD_SIGACTION=y
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CONFIG_OLD_SIGSUSPEND3=y
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CONFIG_OUTER_CACHE=y
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CONFIG_OUTER_CACHE_SYNC=y
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CONFIG_PADATA=y
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CONFIG_PAGE_OFFSET=0xC0000000
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CONFIG_PCI=y
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CONFIG_PCIEAER=y
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CONFIG_PCIEASPM=y
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CONFIG_PCIEASPM_DEFAULT=y
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# CONFIG_PCIEASPM_PERFORMANCE is not set
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# CONFIG_PCIEASPM_POWERSAVE is not set
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# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
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CONFIG_PCIEPORTBUS=y
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CONFIG_PCIE_PME=y
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CONFIG_PCI_DOMAINS=y
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CONFIG_PCI_DOMAINS_GENERIC=y
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CONFIG_PCI_MSI=y
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CONFIG_PCI_MSI_ARCH_FALLBACKS=y
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CONFIG_PCI_MSI_IRQ_DOMAIN=y
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CONFIG_PCI_TEGRA=y
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CONFIG_PERF_USE_VMALLOC=y
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CONFIG_PGTABLE_LEVELS=2
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CONFIG_PHY_TEGRA_XUSB=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_TEGRA=y
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CONFIG_PINCTRL_TEGRA20=y
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CONFIG_PINCTRL_TEGRA_XUSB=y
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CONFIG_PL310_ERRATA_727915=y
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CONFIG_PL310_ERRATA_769419=y
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CONFIG_PL353_SMC=y
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CONFIG_PM=y
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CONFIG_PM_CLK=y
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CONFIG_PM_OPP=y
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CONFIG_PM_SLEEP=y
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CONFIG_PM_SLEEP_SMP=y
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CONFIG_POWER_RESET=y
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CONFIG_POWER_RESET_GPIO=y
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CONFIG_POWER_SUPPLY=y
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CONFIG_PROC_PAGE_MONITOR=y
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CONFIG_PWM=y
|
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CONFIG_PWM_SYSFS=y
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CONFIG_PWM_TEGRA=y
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CONFIG_RAS=y
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CONFIG_RATIONAL=y
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CONFIG_REGMAP=y
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CONFIG_REGMAP_I2C=y
|
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CONFIG_REGMAP_MMIO=y
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CONFIG_REGMAP_SPI=y
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CONFIG_REGULATOR=y
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CONFIG_REGULATOR_FIXED_VOLTAGE=y
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CONFIG_REGULATOR_GPIO=y
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CONFIG_RESET_CONTROLLER=y
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CONFIG_RFS_ACCEL=y
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CONFIG_RPS=y
|
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CONFIG_RTC_CLASS=y
|
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CONFIG_RTC_DRV_TEGRA=y
|
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CONFIG_RTC_I2C_AND_SPI=y
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CONFIG_RTC_MC146818_LIB=y
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CONFIG_RTC_NVMEM=y
|
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CONFIG_RWSEM_SPIN_ON_OWNER=y
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CONFIG_SCSI=y
|
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# CONFIG_SCSI_LOWLEVEL is not set
|
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# CONFIG_SCSI_PROC_FS is not set
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CONFIG_SERIAL_8250_FSL=y
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CONFIG_SERIAL_8250_TEGRA=y
|
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CONFIG_SERIAL_MCTRL_GPIO=y
|
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CONFIG_SERIAL_OF_PLATFORM=y
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CONFIG_SERIAL_TEGRA=y
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CONFIG_SERIO=y
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CONFIG_SERIO_LIBPS2=y
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CONFIG_SGL_ALLOC=y
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CONFIG_SG_POOL=y
|
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CONFIG_SMP=y
|
||||
CONFIG_SMP_ON_UP=y
|
||||
CONFIG_SND=y
|
||||
# CONFIG_SND_COMPRESS_OFFLOAD is not set
|
||||
CONFIG_SND_DMAENGINE_PCM=y
|
||||
# CONFIG_SND_DRIVERS is not set
|
||||
# CONFIG_SND_HDA_TEGRA is not set
|
||||
CONFIG_SND_JACK=y
|
||||
CONFIG_SND_JACK_INPUT_DEV=y
|
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# CONFIG_SND_PCI is not set
|
||||
CONFIG_SND_PCM=y
|
||||
# CONFIG_SND_PROC_FS is not set
|
||||
CONFIG_SND_SIMPLE_CARD=y
|
||||
CONFIG_SND_SIMPLE_CARD_UTILS=y
|
||||
CONFIG_SND_SOC=y
|
||||
CONFIG_SND_SOC_AC97_BUS=y
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||||
CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
|
||||
CONFIG_SND_SOC_I2C_AND_SPI=y
|
||||
CONFIG_SND_SOC_TEGRA=y
|
||||
# CONFIG_SND_SOC_TEGRA186_DSPK is not set
|
||||
CONFIG_SND_SOC_TEGRA20_AC97=y
|
||||
CONFIG_SND_SOC_TEGRA20_DAS=y
|
||||
CONFIG_SND_SOC_TEGRA20_I2S=y
|
||||
CONFIG_SND_SOC_TEGRA20_SPDIF=y
|
||||
# CONFIG_SND_SOC_TEGRA210_ADMAIF is not set
|
||||
# CONFIG_SND_SOC_TEGRA210_AHUB is not set
|
||||
# CONFIG_SND_SOC_TEGRA210_DMIC is not set
|
||||
# CONFIG_SND_SOC_TEGRA210_I2S is not set
|
||||
# CONFIG_SND_SOC_TEGRA30_AHUB is not set
|
||||
# CONFIG_SND_SOC_TEGRA30_I2S is not set
|
||||
# CONFIG_SND_SOC_TEGRA_ALC5632 is not set
|
||||
# CONFIG_SND_SOC_TEGRA_MAX98090 is not set
|
||||
# CONFIG_SND_SOC_TEGRA_RT5640 is not set
|
||||
# CONFIG_SND_SOC_TEGRA_RT5677 is not set
|
||||
# CONFIG_SND_SOC_TEGRA_SGTL5000 is not set
|
||||
CONFIG_SND_SOC_TEGRA_TRIMSLICE=y
|
||||
# CONFIG_SND_SOC_TEGRA_WM8753 is not set
|
||||
# CONFIG_SND_SOC_TEGRA_WM8903 is not set
|
||||
# CONFIG_SND_SOC_TEGRA_WM9712 is not set
|
||||
CONFIG_SND_SOC_TLV320AIC23=y
|
||||
CONFIG_SND_SOC_TLV320AIC23_I2C=y
|
||||
# CONFIG_SND_USB is not set
|
||||
CONFIG_SOC_BUS=y
|
||||
CONFIG_SOC_TEGRA20_VOLTAGE_COUPLER=y
|
||||
CONFIG_SOC_TEGRA_FLOWCTRL=y
|
||||
CONFIG_SOC_TEGRA_FUSE=y
|
||||
CONFIG_SOC_TEGRA_PMC=y
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SOUND_OSS_CORE=y
|
||||
CONFIG_SOUND_OSS_CORE_PRECLAIM=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_MASTER=y
|
||||
CONFIG_SPI_MEM=y
|
||||
# CONFIG_SPI_TEGRA114 is not set
|
||||
CONFIG_SPI_TEGRA20_SFLASH=y
|
||||
CONFIG_SPI_TEGRA20_SLINK=y
|
||||
CONFIG_SRCU=y
|
||||
CONFIG_SUSPEND=y
|
||||
CONFIG_SUSPEND_FREEZER=y
|
||||
CONFIG_SWP_EMULATE=y
|
||||
CONFIG_SYNC_FILE=y
|
||||
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
|
||||
CONFIG_TEGRA20_APB_DMA=y
|
||||
CONFIG_TEGRA20_EMC=y
|
||||
CONFIG_TEGRA_AHB=y
|
||||
CONFIG_TEGRA_GMI=y
|
||||
CONFIG_TEGRA_HOST1X=y
|
||||
CONFIG_TEGRA_HOST1X_FIREWALL=y
|
||||
CONFIG_TEGRA_IOMMU_GART=y
|
||||
# CONFIG_TEGRA_IOMMU_SMMU is not set
|
||||
# CONFIG_TEGRA_IVC is not set
|
||||
CONFIG_TEGRA_MC=y
|
||||
# CONFIG_TEGRA_SOCTHERM is not set
|
||||
CONFIG_TEGRA_TIMER=y
|
||||
CONFIG_TEGRA_WATCHDOG=y
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TREE_RCU=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
# CONFIG_UACCE is not set
|
||||
# CONFIG_UCLAMP_TASK is not set
|
||||
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
|
||||
CONFIG_UNWINDER_ARM=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_COMMON=y
|
||||
CONFIG_USB_CONN_GPIO=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
# CONFIG_USB_EHCI_HCD_PLATFORM is not set
|
||||
CONFIG_USB_EHCI_TEGRA=y
|
||||
CONFIG_USB_HID=y
|
||||
CONFIG_USB_HIDDEV=y
|
||||
CONFIG_USB_PHY=y
|
||||
CONFIG_USB_ROLE_SWITCH=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_TEGRA_PHY=y
|
||||
CONFIG_USB_ULPI=y
|
||||
CONFIG_USB_ULPI_VIEWPORT=y
|
||||
CONFIG_USE_OF=y
|
||||
CONFIG_VFP=y
|
||||
CONFIG_VFPv3=y
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
# CONFIG_USB_XHCI_TEGRA is not set
|
||||
CONFIG_XPS=y
|
||||
CONFIG_XZ_DEC_ARM=y
|
||||
CONFIG_XZ_DEC_ARMTHUMB=y
|
||||
CONFIG_XZ_DEC_BCJ=y
|
||||
CONFIG_ZBOOT_ROM_BSS=0
|
||||
CONFIG_ZBOOT_ROM_TEXT=0
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
@ -0,0 +1,77 @@
|
||||
From patchwork Fri Jul 13 11:32:42 2018
|
||||
Content-Type: text/plain; charset="utf-8"
|
||||
MIME-Version: 1.0
|
||||
Content-Transfer-Encoding: 7bit
|
||||
Subject: serial8250 on tegra hsuart: recover from spurious interrupts due to
|
||||
tegra2 silicon bug
|
||||
X-Patchwork-Submitter: "David R. Piegdon" <lkml@p23q.org>
|
||||
X-Patchwork-Id: 943440
|
||||
Message-Id: <4676ea34-69ce-5422-1ded-94218b89f7d9@p23q.org>
|
||||
To: linux-tegra@vger.kernel.org
|
||||
Date: Fri, 13 Jul 2018 11:32:42 +0000
|
||||
From: "David R. Piegdon" <lkml@p23q.org>
|
||||
List-Id: <linux-tegra.vger.kernel.org>
|
||||
|
||||
Hi,
|
||||
a while back I sent a few mails regarding spurious interrupts in the
|
||||
UARTA (hsuart) block of the Tegra2 SoC, when using the 8250 driver for
|
||||
it instead of the hsuart driver. After going down a pretty deep
|
||||
debugging/testing hole, I think I found a patch that fixes the issue. So
|
||||
far testing in a reboot-cycle suggests that the error frequency dropped
|
||||
from >3% of all reboots to at least <0.05% of all reboots. Tests
|
||||
continue to run over the weekend.
|
||||
|
||||
The patch below already is a second iteration; the first did not reset
|
||||
the MCR or contain the lines below '// clear interrupts'. This resulted
|
||||
in no more spurious interrupts, but in a few % of spurious interrupts
|
||||
that were recovered the UART block did not receive any characters any
|
||||
more. So further resetting was required to fully reacquire operational
|
||||
state of the UART block.
|
||||
|
||||
I'd love any comments/suggestions on this!
|
||||
|
||||
Cheers,
|
||||
|
||||
David
|
||||
|
||||
--- a/drivers/tty/serial/8250/8250_core.c
|
||||
+++ b/drivers/tty/serial/8250/8250_core.c
|
||||
@@ -134,6 +134,38 @@ static irqreturn_t serial8250_interrupt(
|
||||
|
||||
if (l == i->head && pass_counter++ > PASS_LIMIT)
|
||||
break;
|
||||
+
|
||||
+#ifdef CONFIG_ARCH_TEGRA_2x_SOC
|
||||
+ if (!handled && (port->type == PORT_TEGRA)) {
|
||||
+ /*
|
||||
+ * Fix Tegra 2 CPU silicon bug where sometimes
|
||||
+ * "TX holding register empty" interrupts result in a
|
||||
+ * bad (metastable?) state in Tegras HSUART IP core.
|
||||
+ * Only way to recover seems to be to reset all
|
||||
+ * interrupts as well as the TX queue and the MCR.
|
||||
+ * But we don't want to loose any outgoing characters,
|
||||
+ * so only do it if the RX and TX queues are empty.
|
||||
+ */
|
||||
+ unsigned char lsr = port->serial_in(port, UART_LSR);
|
||||
+ const unsigned char fifo_empty_mask =
|
||||
+ (UART_LSR_TEMT | UART_LSR_THRE);
|
||||
+ if (((lsr & (UART_LSR_DR | fifo_empty_mask)) ==
|
||||
+ fifo_empty_mask)) {
|
||||
+ port->serial_out(port, UART_IER, 0);
|
||||
+ port->serial_out(port, UART_MCR, 0);
|
||||
+ serial8250_clear_and_reinit_fifos(up);
|
||||
+ port->serial_out(port, UART_MCR, up->mcr);
|
||||
+ port->serial_out(port, UART_IER, up->ier);
|
||||
+ // clear interrupts
|
||||
+ serial_port_in(port, UART_LSR);
|
||||
+ serial_port_in(port, UART_RX);
|
||||
+ serial_port_in(port, UART_IIR);
|
||||
+ serial_port_in(port, UART_MSR);
|
||||
+ up->lsr_saved_flags = 0;
|
||||
+ up->msr_saved_flags = 0;
|
||||
+ }
|
||||
+ }
|
||||
+#endif
|
||||
} while (l != end);
|
||||
|
||||
spin_unlock(&i->lock);
|
||||
@ -0,0 +1,46 @@
|
||||
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
|
||||
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
|
||||
@@ -201,16 +201,17 @@
|
||||
conf_ata {
|
||||
nvidia,pins = "ata", "atc", "atd", "ate",
|
||||
"crtp", "dap2", "dap3", "dap4", "dta",
|
||||
- "dtb", "dtc", "dtd", "dte", "gmb",
|
||||
- "gme", "i2cp", "pta", "slxc", "slxd",
|
||||
- "spdi", "spdo", "uda";
|
||||
+ "dtb", "dtc", "dtd", "gmb", "gme",
|
||||
+ "i2cp", "pta", "slxc", "slxd", "spdi",
|
||||
+ "spdo", "uda";
|
||||
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
||||
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
conf_atb {
|
||||
nvidia,pins = "atb", "cdev1", "cdev2", "dap1",
|
||||
- "gma", "gmc", "gmd", "gpu", "gpu7",
|
||||
- "gpv", "sdio1", "slxa", "slxk", "uac";
|
||||
+ "dte", "gma", "gmc", "gmd", "gpu",
|
||||
+ "gpu7", "gpv", "sdio1", "slxa", "slxk",
|
||||
+ "uac";
|
||||
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
};
|
||||
@@ -396,6 +397,20 @@
|
||||
};
|
||||
};
|
||||
|
||||
+ gpio-leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ ds2 {
|
||||
+ label = "trimslice:green:right";
|
||||
+ gpios = <&gpio TEGRA_GPIO(D, 2) GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+
|
||||
+ ds3 {
|
||||
+ label = "trimslice:green:left";
|
||||
+ gpios = <&gpio TEGRA_GPIO(BB, 5) GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
poweroff {
|
||||
compatible = "gpio-poweroff";
|
||||
gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
|
||||
Loading…
Reference in New Issue
Block a user