mirror of
git://git.openwrt.org/openwrt/openwrt.git
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rockchip: add Radxa E25 board support
Radxa E25 is a network application carrier board for the Radxa CM3 Industrial (CM3I) SoM, which is based on the Rockchip RK3568 SoC. It has the following features: - MicroSD card socket, on board eMMC flash - 2x 2.5GbE Realtek RTL8125B Ethernet transceiver - 1x USB Type-C port (Power and Serial console) - 1x USB 3.0 OTG port - mini PCIe socket (USB or PCIe) - ngff PCIe socket (USB or SATA) - 1x User LED and 16x RGB LEDs - 26-pin expansion header Installation: Uncompress the OpenWrt sysupgrade and write it to a micro SD card or internal eMMC using dd. Signed-off-by: Marius Durbaca <mariusd84@gmail.com>
This commit is contained in:
Marius Durbaca
Nick Hainke
parent
ce5661e455
commit
f7c732bf9e
@ -16,7 +16,8 @@ rockchip_setup_interfaces()
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xunlong,orangepi-r1-plus-lts)
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ucidef_set_interfaces_lan_wan 'eth1' 'eth0'
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;;
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friendlyarm,nanopi-r5c)
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friendlyarm,nanopi-r5c|\
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radxa,e25)
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ucidef_set_interfaces_lan_wan 'eth0' 'eth1'
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;;
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friendlyarm,nanopi-r5s)
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@ -43,7 +43,8 @@ friendlyarm,nanopi-r4s-enterprise)
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set_interface_core 10 "eth0"
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set_interface_core 20 "eth1"
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;;
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friendlyarm,nanopi-r5c)
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friendlyarm,nanopi-r5c|\
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radxa,e25)
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set_interface_core 2 "eth0"
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set_interface_core 4 "eth1"
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;;
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@ -104,6 +104,16 @@ define Device/radxa_cm3-io
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endef
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TARGET_DEVICES += radxa_cm3-io
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define Device/radxa_e25
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DEVICE_VENDOR := Radxa
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DEVICE_MODEL := E25
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SOC := rk3568
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DEVICE_DTS := rockchip/rk3568-radxa-e25
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UBOOT_DEVICE_NAME := radxa-e25-rk3568
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DEVICE_PACKAGES := kmod-r8169 kmod-ata-ahci-platform
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endef
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TARGET_DEVICES += radxa_e25
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define Device/radxa_rock-pi-4a
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DEVICE_VENDOR := Radxa
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DEVICE_MODEL := ROCK Pi 4A
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@ -0,0 +1,689 @@
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From 2bf2f4d9f673013a58109626b87329310537a611 Mon Sep 17 00:00:00 2001
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From: Chukun Pan <amadeus@jmu.edu.cn>
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Date: Fri, 9 Dec 2022 18:25:24 +0800
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Subject: [PATCH] arm64: dts: rockchip: Add Radxa CM3I E25
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Radxa E25 is a network application carrier board for the Radxa CM3
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Industrial (CM3I) SoM, which is based on the Rockchip RK3568 SoC.
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It has the following features:
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- MicroSD card socket, on board eMMC flash
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- 2x 2.5GbE Realtek RTL8125B Ethernet transceiver
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- 1x USB Type-C port (Power and Serial console)
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- 1x USB 3.0 OTG port
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- mini PCIe socket (USB or PCIe)
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- ngff PCIe socket (USB or SATA)
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- 1x User LED and 16x RGB LEDs
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- 26-pin expansion header
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Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
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Link: https://lore.kernel.org/r/20221209102524.129367-3-amadeus@jmu.edu.cn
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/Makefile | 1 +
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.../boot/dts/rockchip/rk3568-radxa-cm3i.dtsi | 416 ++++++++++++++++++
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.../boot/dts/rockchip/rk3568-radxa-e25.dts | 229 ++++++++++
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3 files changed, 646 insertions(+)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
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--- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -78,4 +78,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bp
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi
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@@ -0,0 +1,416 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/leds/common.h>
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+#include <dt-bindings/pinctrl/rockchip.h>
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+#include "rk3568.dtsi"
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+
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+/ {
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+ model = "Radxa CM3 Industrial Board";
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+ compatible = "radxa,cm3i", "rockchip,rk3568";
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+
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+ aliases {
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+ mmc0 = &sdhci;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial2:115200n8";
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+ };
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+
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+ gpio-leds {
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+ compatible = "gpio-leds";
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+
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+ led_user: led-0 {
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+ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
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+ function = LED_FUNCTION_HEARTBEAT;
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+ color = <LED_COLOR_ID_GREEN>;
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+ linux,default-trigger = "heartbeat";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&led_user_en>;
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+ };
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+ };
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+
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+ pcie30_avdd0v9: pcie30-avdd0v9-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "pcie30_avdd0v9";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+ vin-supply = <&vcc3v3_sys>;
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+ };
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+
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+ pcie30_avdd1v8: pcie30-avdd1v8-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "pcie30_avdd1v8";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc3v3_sys>;
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+ };
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+
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+ vcc3v3_sys: vcc3v3-sys-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc5v_input>;
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+ };
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+
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+ vcc5v0_sys: vcc5v0-sys-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc5v_input>;
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+ };
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+
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+ /* labeled +5v_input in schematic */
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+ vcc5v_input: vcc5v-input-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v_input";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+};
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+
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+&combphy0 {
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+ status = "okay";
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+};
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+
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+&combphy1 {
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+ status = "okay";
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+};
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+
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+&combphy2 {
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+ status = "okay";
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+};
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+
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+&cpu0 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu1 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu2 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu3 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&display_subsystem {
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+ status = "disabled";
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+};
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+
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+&gpu {
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+ mali-supply = <&vdd_gpu>;
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+ status = "okay";
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+};
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+
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+&i2c0 {
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+ status = "okay";
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+
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+ vdd_cpu: regulator@1c {
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+ compatible = "tcs,tcs4525";
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+ reg = <0x1c>;
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+ fcs,suspend-voltage-selector = <1>;
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+ regulator-name = "vdd_cpu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <800000>;
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+ regulator-max-microvolt = <1150000>;
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+ regulator-ramp-delay = <2300>;
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+ vin-supply = <&vcc5v_input>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ rk809: pmic@20 {
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+ compatible = "rockchip,rk809";
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+ reg = <0x20>;
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+ interrupt-parent = <&gpio0>;
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+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
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+ #clock-cells = <1>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pmic_int>;
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+ rockchip,system-power-controller;
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+ wakeup-source;
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+
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+ vcc1-supply = <&vcc3v3_sys>;
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+ vcc2-supply = <&vcc3v3_sys>;
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+ vcc3-supply = <&vcc3v3_sys>;
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+ vcc4-supply = <&vcc3v3_sys>;
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+ vcc5-supply = <&vcc3v3_sys>;
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+ vcc6-supply = <&vcc3v3_sys>;
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+ vcc7-supply = <&vcc3v3_sys>;
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+ vcc8-supply = <&vcc3v3_sys>;
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+ vcc9-supply = <&vcc3v3_sys>;
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+
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+ regulators {
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+ vdd_logic: DCDC_REG1 {
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+ regulator-name = "vdd_logic";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-init-microvolt = <900000>;
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <500000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdd_gpu: DCDC_REG2 {
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+ regulator-name = "vdd_gpu";
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+ regulator-always-on;
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+ regulator-init-microvolt = <900000>;
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <500000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc_ddr: DCDC_REG3 {
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+ regulator-name = "vcc_ddr";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-initial-mode = <0x2>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ };
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+ };
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+
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+ vdd_npu: DCDC_REG4 {
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+ regulator-name = "vdd_npu";
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+ regulator-init-microvolt = <900000>;
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <500000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc_1v8: DCDC_REG5 {
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+ regulator-name = "vcc_1v8";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdda0v9_image: LDO_REG1 {
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+ regulator-name = "vdda0v9_image";
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdda_0v9: LDO_REG2 {
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+ regulator-name = "vdda_0v9";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdda0v9_pmu: LDO_REG3 {
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+ regulator-name = "vdda0v9_pmu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <900000>;
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+ };
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+ };
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+
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+ vccio_acodec: LDO_REG4 {
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+ regulator-name = "vccio_acodec";
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+ regulator-always-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vccio_sd: LDO_REG5 {
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+ regulator-name = "vccio_sd";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc3v3_pmu: LDO_REG6 {
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+ regulator-name = "vcc3v3_pmu";
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+ regulator-always-on;
|
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+ regulator-boot-on;
|
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+ regulator-min-microvolt = <3300000>;
|
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+ regulator-max-microvolt = <3300000>;
|
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
|
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+ regulator-suspend-microvolt = <3300000>;
|
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+ };
|
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+ };
|
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+
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+ vcca_1v8: LDO_REG7 {
|
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+ regulator-name = "vcca_1v8";
|
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+ regulator-always-on;
|
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+ regulator-boot-on;
|
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+ regulator-min-microvolt = <1800000>;
|
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+ regulator-max-microvolt = <1800000>;
|
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+
|
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
|
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+ };
|
||||
+ };
|
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+
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+ vcca1v8_pmu: LDO_REG8 {
|
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+ regulator-name = "vcca1v8_pmu";
|
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+ regulator-always-on;
|
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+ regulator-boot-on;
|
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+ regulator-min-microvolt = <1800000>;
|
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+ regulator-max-microvolt = <1800000>;
|
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+
|
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+ regulator-state-mem {
|
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+ regulator-on-in-suspend;
|
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+ regulator-suspend-microvolt = <1800000>;
|
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+ };
|
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+ };
|
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+
|
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+ vcca1v8_image: LDO_REG9 {
|
||||
+ regulator-name = "vcca1v8_image";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
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+ vcc_3v3: SWITCH_REG1 {
|
||||
+ regulator-name = "vcc_3v3";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
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+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_sd: SWITCH_REG2 {
|
||||
+ regulator-name = "vcc3v3_sd";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ leds {
|
||||
+ led_user_en: led_user_en {
|
||||
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pmic {
|
||||
+ pmic_int: pmic_int {
|
||||
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pmu_io_domains {
|
||||
+ pmuio1-supply = <&vcc3v3_pmu>;
|
||||
+ pmuio2-supply = <&vcc3v3_pmu>;
|
||||
+ vccio1-supply = <&vccio_acodec>;
|
||||
+ vccio2-supply = <&vcc_1v8>;
|
||||
+ vccio3-supply = <&vccio_sd>;
|
||||
+ vccio4-supply = <&vcc_1v8>;
|
||||
+ vccio5-supply = <&vcc_3v3>;
|
||||
+ vccio6-supply = <&vcc_1v8>;
|
||||
+ vccio7-supply = <&vcc_3v3>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ vref-supply = <&vcca_1v8>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdhci {
|
||||
+ bus-width = <8>;
|
||||
+ max-frequency = <200000000>;
|
||||
+ non-removable;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
|
||||
+ vmmc-supply = <&vcc_3v3>;
|
||||
+ vqmmc-supply = <&vcc_1v8>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tsadc {
|
||||
+ rockchip,hw-tshut-mode = <1>;
|
||||
+ rockchip,hw-tshut-polarity = <0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_xhci {
|
||||
+ extcon = <&usb2phy0>;
|
||||
+};
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
|
||||
@@ -0,0 +1,229 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+
|
||||
+/dts-v1/;
|
||||
+#include "rk3568-radxa-cm3i.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Radxa E25";
|
||||
+ compatible = "radxa,e25", "rockchip,rk3568";
|
||||
+
|
||||
+ aliases {
|
||||
+ mmc0 = &sdmmc0;
|
||||
+ mmc1 = &sdhci;
|
||||
+ };
|
||||
+
|
||||
+ pwm-leds {
|
||||
+ compatible = "pwm-leds-multicolor";
|
||||
+
|
||||
+ multi-led {
|
||||
+ color = <LED_COLOR_ID_RGB>;
|
||||
+ max-brightness = <255>;
|
||||
+
|
||||
+ led-red {
|
||||
+ color = <LED_COLOR_ID_RED>;
|
||||
+ pwms = <&pwm1 0 1000000 0>;
|
||||
+ };
|
||||
+
|
||||
+ led-green {
|
||||
+ color = <LED_COLOR_ID_GREEN>;
|
||||
+ pwms = <&pwm2 0 1000000 0>;
|
||||
+ };
|
||||
+
|
||||
+ led-blue {
|
||||
+ color = <LED_COLOR_ID_BLUE>;
|
||||
+ pwms = <&pwm12 0 1000000 0>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vbus_typec: vbus-typec-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ enable-active-high;
|
||||
+ gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&vbus_typec_en>;
|
||||
+ regulator-name = "vbus_typec";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ vin-supply = <&vcc5v0_sys>;
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_minipcie: vcc3v3-minipcie-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ enable-active-high;
|
||||
+ gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&minipcie_enable_h>;
|
||||
+ regulator-name = "vcc3v3_minipcie";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ vin-supply = <&vcc5v0_sys>;
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_ngff: vcc3v3-ngff-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ enable-active-high;
|
||||
+ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&ngffpcie_enable_h>;
|
||||
+ regulator-name = "vcc3v3_ngff";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ vin-supply = <&vcc5v0_sys>;
|
||||
+ };
|
||||
+
|
||||
+ /* actually fed by vcc5v0_sys, dependent
|
||||
+ * on pi6c clock generator
|
||||
+ */
|
||||
+ vcc3v3_pcie30x1: vcc3v3-pcie30x1-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ enable-active-high;
|
||||
+ gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pcie30x1_enable_h>;
|
||||
+ regulator-name = "vcc3v3_pcie30x1";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ vin-supply = <&vcc3v3_pi6c_05>;
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ enable-active-high;
|
||||
+ gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pcie_enable_h>;
|
||||
+ regulator-name = "vcc3v3_pcie";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ vin-supply = <&vcc5v0_sys>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pcie2x1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pcie20_reset_h>;
|
||||
+ reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
+ vpcie3v3-supply = <&vcc3v3_pi6c_05>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pcie30phy {
|
||||
+ data-lanes = <1 2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pcie3x1 {
|
||||
+ num-lanes = <1>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pcie30x1m0_pins>;
|
||||
+ reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
|
||||
+ vpcie3v3-supply = <&vcc3v3_pcie30x1>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pcie3x2 {
|
||||
+ num-lanes = <1>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pcie30x2_reset_h>;
|
||||
+ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
|
||||
+ vpcie3v3-supply = <&vcc3v3_pi6c_05>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ pcie {
|
||||
+ pcie20_reset_h: pcie20-reset-h {
|
||||
+ rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ pcie30x1_enable_h: pcie30x1-enable-h {
|
||||
+ rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ pcie30x2_reset_h: pcie30x2-reset-h {
|
||||
+ rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ pcie_enable_h: pcie-enable-h {
|
||||
+ rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ usb {
|
||||
+ minipcie_enable_h: minipcie-enable-h {
|
||||
+ rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ ngffpcie_enable_h: ngffpcie-enable-h {
|
||||
+ rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ vbus_typec_en: vbus_typec_en {
|
||||
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pwm1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pwm2 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pwm12 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pwm12m1_pins>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdmmc0 {
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
|
||||
+ /* Also used in pcie30x1_clkreqnm0 */
|
||||
+ disable-wp;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>;
|
||||
+ sd-uhs-sdr104;
|
||||
+ vmmc-supply = <&vcc3v3_sd>;
|
||||
+ vqmmc-supply = <&vccio_sd>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ehci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ohci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_xhci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_ehci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_ohci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0_otg {
|
||||
+ phy-supply = <&vbus_typec>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy1_host {
|
||||
+ phy-supply = <&vcc3v3_minipcie>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy1_otg {
|
||||
+ phy-supply = <&vcc3v3_ngff>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
@ -0,0 +1,48 @@
|
||||
From c80992abd2877590059e9cb254213c16824e2106 Mon Sep 17 00:00:00 2001
|
||||
From: Jagan Teki <jagan@amarulasolutions.com>
|
||||
Date: Wed, 18 Jan 2023 13:34:53 +0530
|
||||
Subject: [PATCH] arm64: dts: rockchip: Update eMMC, SD aliases for Radxa SoM
|
||||
boards
|
||||
|
||||
Radxa has produced Compute Modules like RK3399pro VMARC and CM3i with
|
||||
onboarding eMMC flash, so the eMMC is the primary MMC device.
|
||||
|
||||
On the other hand, Rockchip boot orders start from eMMC from an MMC
|
||||
device perspective.
|
||||
|
||||
Mark, the eMMC has mmc0 to satisfy the above two conditions.
|
||||
|
||||
Reported-by: FUKAUMI Naoki <naoki@radxa.com>
|
||||
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
|
||||
Link: https://lore.kernel.org/r/20230118080454.11643-1-jagan@amarulasolutions.com
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 4 ++--
|
||||
arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts | 3 +--
|
||||
2 files changed, 3 insertions(+), 4 deletions(-)
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
|
||||
@@ -13,8 +13,8 @@
|
||||
compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro";
|
||||
|
||||
aliases {
|
||||
- mmc0 = &sdmmc;
|
||||
- mmc1 = &sdhci;
|
||||
+ mmc0 = &sdhci;
|
||||
+ mmc1 = &sdmmc;
|
||||
};
|
||||
|
||||
vcc3v3_pcie: vcc-pcie-regulator {
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
|
||||
@@ -8,8 +8,7 @@
|
||||
compatible = "radxa,e25", "rockchip,rk3568";
|
||||
|
||||
aliases {
|
||||
- mmc0 = &sdmmc0;
|
||||
- mmc1 = &sdhci;
|
||||
+ mmc1 = &sdmmc0;
|
||||
};
|
||||
|
||||
pwm-leds {
|
||||
@ -0,0 +1,35 @@
|
||||
From c4d2b02d63ee38b381fbc886c02eecfec4f981cc Mon Sep 17 00:00:00 2001
|
||||
From: Jagan Teki <jagan@amarulasolutions.com>
|
||||
Date: Mon, 23 Jan 2023 12:46:51 +0530
|
||||
Subject: [PATCH] arm64: dts: rockchip: Add missing CM3i fallback compatible
|
||||
for Radxa E25
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
In order to function the Radxa E25 Carrier board, it is mandatory to
|
||||
mount the Radxa CM3i module.
|
||||
|
||||
Add Radxa CM3i compatible as fallback compatible to string to satisfy
|
||||
the Module and Carrier board topology.
|
||||
|
||||
Fixes: 2bf2f4d9f673 ("arm64: dts: rockchip: Add Radxa CM3I E25")
|
||||
Cc: Chukun Pan <amadeus@jmu.edu.cn>
|
||||
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
|
||||
Link: https://lore.kernel.org/r/20230123071654.73139-2-jagan@amarulasolutions.com
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
|
||||
@@ -5,7 +5,7 @@
|
||||
|
||||
/ {
|
||||
model = "Radxa E25";
|
||||
- compatible = "radxa,e25", "rockchip,rk3568";
|
||||
+ compatible = "radxa,e25", "radxa,cm3i", "rockchip,rk3568";
|
||||
|
||||
aliases {
|
||||
mmc1 = &sdmmc0;
|
||||
@ -0,0 +1,28 @@
|
||||
From ef9134d9bbce071c9e4ebdcbb6f8fb1a5dd0a67e Mon Sep 17 00:00:00 2001
|
||||
From: Jagan Teki <jagan@amarulasolutions.com>
|
||||
Date: Mon, 23 Jan 2023 12:46:53 +0530
|
||||
Subject: [PATCH] arm64: dts: rockchip: Correct the model name for Radxa E25
|
||||
|
||||
Radxa E25 is a Carrier board, so update the model name for Radxa E25
|
||||
as suggested by the Radxa website.
|
||||
|
||||
Fixes: 2bf2f4d9f673 ("arm64: dts: rockchip: Add Radxa CM3I E25")
|
||||
Cc: Chukun Pan <amadeus@jmu.edu.cn>
|
||||
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
|
||||
Link: https://lore.kernel.org/r/20230123071654.73139-4-jagan@amarulasolutions.com
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
|
||||
@@ -4,7 +4,7 @@
|
||||
#include "rk3568-radxa-cm3i.dtsi"
|
||||
|
||||
/ {
|
||||
- model = "Radxa E25";
|
||||
+ model = "Radxa E25 Carrier Board";
|
||||
compatible = "radxa,e25", "radxa,cm3i", "rockchip,rk3568";
|
||||
|
||||
aliases {
|
||||
@ -0,0 +1,79 @@
|
||||
From a87852e37f782257ebc57cc44a0d3fbf806471f6 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Mon, 24 Jul 2023 14:52:16 +0000
|
||||
Subject: [PATCH] arm64: dts: rockchip: Fix PCIe regulators on Radxa E25
|
||||
|
||||
Despite its name, the regulator vcc3v3_pcie30x1 has nothing to do with
|
||||
pcie30x1. Instead, it supply power to VBAT1-5 on the M.2 KEY B port as
|
||||
seen on page 8 of the schematic [1].
|
||||
|
||||
pcie30x1 is used for the mini PCIe slot, and as seen on page 9 the
|
||||
vcc3v3_minipcie regulator is instead related to pcie30x1.
|
||||
|
||||
The M.2 KEY B port can be used for WWAN USB2 modules or SATA drives.
|
||||
|
||||
Use correct regulator vcc3v3_minipcie for pcie30x1.
|
||||
|
||||
[1] https://dl.radxa.com/cm3p/e25/radxa-e25-v1.4-sch.pdf
|
||||
|
||||
Fixes: 2bf2f4d9f673 ("arm64: dts: rockchip: Add Radxa CM3I E25")
|
||||
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
Link: https://lore.kernel.org/r/20230724145213.3833099-1-jonas@kwiboo.se
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
.../arm64/boot/dts/rockchip/rk3568-radxa-e25.dts | 16 ++++++++--------
|
||||
1 file changed, 8 insertions(+), 8 deletions(-)
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
|
||||
@@ -47,6 +47,9 @@
|
||||
vin-supply = <&vcc5v0_sys>;
|
||||
};
|
||||
|
||||
+ /* actually fed by vcc5v0_sys, dependent
|
||||
+ * on pi6c clock generator
|
||||
+ */
|
||||
vcc3v3_minipcie: vcc3v3-minipcie-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
enable-active-high;
|
||||
@@ -54,9 +57,9 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&minipcie_enable_h>;
|
||||
regulator-name = "vcc3v3_minipcie";
|
||||
- regulator-min-microvolt = <5000000>;
|
||||
- regulator-max-microvolt = <5000000>;
|
||||
- vin-supply = <&vcc5v0_sys>;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ vin-supply = <&vcc3v3_pi6c_05>;
|
||||
};
|
||||
|
||||
vcc3v3_ngff: vcc3v3-ngff-regulator {
|
||||
@@ -71,9 +74,6 @@
|
||||
vin-supply = <&vcc5v0_sys>;
|
||||
};
|
||||
|
||||
- /* actually fed by vcc5v0_sys, dependent
|
||||
- * on pi6c clock generator
|
||||
- */
|
||||
vcc3v3_pcie30x1: vcc3v3-pcie30x1-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
enable-active-high;
|
||||
@@ -83,7 +83,7 @@
|
||||
regulator-name = "vcc3v3_pcie30x1";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
- vin-supply = <&vcc3v3_pi6c_05>;
|
||||
+ vin-supply = <&vcc5v0_sys>;
|
||||
};
|
||||
|
||||
vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {
|
||||
@@ -117,7 +117,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie30x1m0_pins>;
|
||||
reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
|
||||
- vpcie3v3-supply = <&vcc3v3_pcie30x1>;
|
||||
+ vpcie3v3-supply = <&vcc3v3_minipcie>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@ -0,0 +1,41 @@
|
||||
From 2bdfe84fbd57a4ed9fd65a67210442559ce078f0 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Mon, 24 Jul 2023 14:52:16 +0000
|
||||
Subject: [PATCH] arm64: dts: rockchip: Enable SATA on Radxa E25
|
||||
|
||||
The M.2 KEY B port can be used for WWAN USB2 modules or SATA drives.
|
||||
|
||||
Enable sata1 node to fix use of SATA drives on the M.2 slot.
|
||||
|
||||
Fixes: 2bf2f4d9f673 ("arm64: dts: rockchip: Add Radxa CM3I E25")
|
||||
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
Link: https://lore.kernel.org/r/20230724145213.3833099-1-jonas@kwiboo.se
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts | 8 ++++++++
|
||||
1 file changed, 8 insertions(+)
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
|
||||
@@ -99,6 +99,10 @@
|
||||
};
|
||||
};
|
||||
|
||||
+&combphy1 {
|
||||
+ phy-supply = <&vcc3v3_pcie30x1>;
|
||||
+};
|
||||
+
|
||||
&pcie2x1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie20_reset_h>;
|
||||
@@ -178,6 +182,10 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&sata1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&sdmmc0 {
|
||||
bus-width = <4>;
|
||||
cap-sd-highspeed;
|
||||
@ -0,0 +1,24 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Marius Durbaca <mariusd84@gmail.com>
|
||||
Date: Tue Feb 27 16:25:27 2024 +0200
|
||||
Subject: [PATCH] arm64: dts: rockchip: Update LED properties for Radxa
|
||||
E25
|
||||
|
||||
Add OpenWrt's LED aliases for showing system status.
|
||||
|
||||
Signed-off-by: Marius Durbaca <mariusd84@gmail.com>
|
||||
---
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
|
||||
@@ -9,6 +9,10 @@
|
||||
|
||||
aliases {
|
||||
mmc1 = &sdmmc0;
|
||||
+ led-boot = &led_user;
|
||||
+ led-failsafe = &led_user;
|
||||
+ led-running = &led_user;
|
||||
+ led-upgrade = &led_user;
|
||||
};
|
||||
|
||||
pwm-leds {
|
||||
Loading…
Reference in New Issue
Block a user