kernel: rtl8367b: remove unnecessary cpu_port setting

Set the appropriate cpu_port value based on the use of realtek,extif0 to extif2
instead of the additional cpu_port parameter.

Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/15033
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Mieczyslaw Nalewaj 2024-06-04 17:59:54 +02:00 committed by Robert Marko
parent c1a26de1c6
commit df28fe4b59
6 changed files with 8 additions and 8 deletions

View File

@ -224,7 +224,6 @@
rtl8367b {
compatible = "realtek,rtl8367b";
cpu_port = <5>;
realtek,extif0 = <1 2 1 1 1 1 1 1 2>;
mii-bus = <&mdio0>;
};

View File

@ -1583,6 +1583,13 @@ static int rtl8367b_detect(struct rtl8366_smi *smi)
dev_info(smi->parent, "RTL%s chip found\n", chip_name);
if (of_property_present(smi->parent->of_node, "realtek,extif2"))
smi->cpu_port = RTL8367B_CPU_PORT_NUM + 2;
else if (of_property_present(smi->parent->of_node, "realtek,extif1") && (chip_ver != 0x1010)) /* for the RTL8367R-VB chip, extif1 corresponds to cpu_port 5 */
smi->cpu_port = RTL8367B_CPU_PORT_NUM + 1;
dev_info(smi->parent, "CPU port: %u\n", smi->cpu_port);
return 0;
}
@ -1621,9 +1628,7 @@ static int rtl8367b_probe(struct platform_device *pdev)
smi->cmd_write = 0xb8;
smi->ops = &rtl8367b_smi_ops;
smi->num_ports = RTL8367B_NUM_PORTS;
if (of_property_read_u32(pdev->dev.of_node, "cpu_port", &smi->cpu_port)
|| smi->cpu_port >= smi->num_ports)
smi->cpu_port = RTL8367B_CPU_PORT_NUM;
smi->cpu_port = RTL8367B_CPU_PORT_NUM;
smi->num_vlan_mc = RTL8367B_NUM_VLANS;
smi->mib_counters = rtl8367b_mib_counters;
smi->num_mib_counters = ARRAY_SIZE(rtl8367b_mib_counters);

View File

@ -55,7 +55,6 @@
rtl8367rb {
compatible = "realtek,rtl8367b";
cpu_port = <6>;
realtek,extif1 = <1 0 1 1 1 1 1 1 2>;
mii-bus = <&mdio0>;
};

View File

@ -74,7 +74,6 @@
rtl8367s {
compatible = "realtek,rtl8367b";
cpu_port = <7>;
realtek,extif2 = <1 0 1 1 1 1 1 1 2>;
mii-bus = <&mdio0>;
phy-id = <29>;

View File

@ -82,7 +82,6 @@
rtl8367s {
compatible = "realtek,rtl8367b";
cpu_port = <7>;
realtek,extif2 = <1 0 1 1 1 1 1 1 2>;
mii-bus = <&mdio0>;
phy-id = <29>;

View File

@ -85,7 +85,6 @@
rtl8367rb {
compatible = "realtek,rtl8367b";
cpu_port = <7>;
realtek,extif2 = <1 0 1 1 1 1 1 1 2>;
mii-bus = <&mdio0>;
};