ar71xx: use gpio_set_value_cansleep on sleeping GPIOs in ath79_spi
SVN-Revision: 32736
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4f66299903
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c7fa38484c
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@ -178,7 +178,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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if (is_active) {
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/* set initial clock polarity */
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@@ -80,20 +83,21 @@ static void ath79_spi_chipselect(struct
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@@ -80,20 +83,24 @@ static void ath79_spi_chipselect(struct
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ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
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}
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@ -203,13 +203,16 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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+ case ATH79_SPI_CS_TYPE_GPIO:
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+ /* SPI is normally active-low */
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+ if (gpio_cansleep(cdata->cs_line))
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+ gpio_set_value_cansleep(cdata->cs_line, cs_high);
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+ else
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+ gpio_set_value(cdata->cs_line, cs_high);
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+ break;
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+ }
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}
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static void ath79_spi_enable(struct ath79_spi *sp)
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@@ -120,24 +124,30 @@ static void ath79_spi_disable(struct ath
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@@ -120,24 +127,30 @@ static void ath79_spi_disable(struct ath
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static int ath79_spi_setup_cs(struct spi_device *spi)
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{
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struct ath79_spi_controller_data *cdata;
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@ -244,7 +247,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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}
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return status;
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@@ -145,9 +155,19 @@ static int ath79_spi_setup_cs(struct spi
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@@ -145,9 +158,19 @@ static int ath79_spi_setup_cs(struct spi
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static void ath79_spi_cleanup_cs(struct spi_device *spi)
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{
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@ -267,7 +270,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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}
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}
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@@ -155,6 +175,9 @@ static int ath79_spi_setup(struct spi_de
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@@ -155,6 +178,9 @@ static int ath79_spi_setup(struct spi_de
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{
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int status = 0;
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@ -277,7 +280,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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if (spi->bits_per_word > 32)
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return -EINVAL;
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@@ -215,6 +238,10 @@ static __devinit int ath79_spi_probe(str
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@@ -215,6 +241,10 @@ static __devinit int ath79_spi_probe(str
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unsigned long rate;
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int ret;
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@ -288,7 +291,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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master = spi_alloc_master(&pdev->dev, sizeof(*sp));
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if (master == NULL) {
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dev_err(&pdev->dev, "failed to allocate spi master\n");
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@@ -224,17 +251,10 @@ static __devinit int ath79_spi_probe(str
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@@ -224,17 +254,10 @@ static __devinit int ath79_spi_probe(str
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sp = spi_master_get_devdata(master);
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platform_set_drvdata(pdev, sp);
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@ -24,7 +24,7 @@
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};
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static inline u32 ath79_spi_rr(struct ath79_spi *sp, unsigned reg)
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@@ -108,9 +118,6 @@ static void ath79_spi_enable(struct ath7
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@@ -111,9 +121,6 @@ static void ath79_spi_enable(struct ath7
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/* save CTRL register */
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sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL);
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sp->ioc_base = ath79_spi_rr(sp, AR71XX_SPI_REG_IOC);
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@ -34,7 +34,7 @@
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}
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static void ath79_spi_disable(struct ath79_spi *sp)
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@@ -229,6 +236,110 @@ static u32 ath79_spi_txrx_mode0(struct s
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@@ -232,6 +239,110 @@ static u32 ath79_spi_txrx_mode0(struct s
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return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS);
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}
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@ -145,7 +145,7 @@
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static __devinit int ath79_spi_probe(struct platform_device *pdev)
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{
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struct spi_master *master;
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@@ -251,6 +362,8 @@ static __devinit int ath79_spi_probe(str
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@@ -254,6 +365,8 @@ static __devinit int ath79_spi_probe(str
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sp = spi_master_get_devdata(master);
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platform_set_drvdata(pdev, sp);
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@ -154,7 +154,7 @@
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master->setup = ath79_spi_setup;
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master->cleanup = ath79_spi_cleanup;
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master->bus_num = pdata->bus_num;
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@@ -259,7 +372,7 @@ static __devinit int ath79_spi_probe(str
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@@ -262,7 +375,7 @@ static __devinit int ath79_spi_probe(str
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sp->bitbang.master = spi_master_get(master);
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sp->bitbang.chipselect = ath79_spi_chipselect;
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sp->bitbang.txrx_word[SPI_MODE_0] = ath79_spi_txrx_mode0;
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@ -163,7 +163,7 @@
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sp->bitbang.flags = SPI_CS_HIGH;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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@@ -284,7 +397,8 @@ static __devinit int ath79_spi_probe(str
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@@ -287,7 +400,8 @@ static __devinit int ath79_spi_probe(str
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if (ret)
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goto err_clk_put;
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